Archive for 2012
Tuesday, July 17th, 2012
MIT is a disorienting place, particularly Stata Center, the home of EECS. There are no straight lines in the building and nothing appears plumb. Architect Frank Gehry, it seems, wanted his design to disturb and overwhelm and there he has succeeded, particularly when it rains: The building leaks. But does the building also stimulate? Again, Gehry has succeeded: The building hums with energy.
On a sunny day in July, the place is crawling with people. Students of various ages, genders, and nationalities wander by chatting in their t-shirts and flip flops, professors share bag lunches with their children in shady corners of the labyrinthine lobby, the line at the deli counter queues around in a disorderly sort of meander, while people in suits mingle with the flip-flop crowd in and under staircases that wander up and off into brick-lined oblivion.
Stata is part intellectual Grand Central Station and part Winchester Mystery House, enticing tourists and visiting scholars alike to wander in off the ponderous corporate streets of Cambridge.
EECS Professor Srini Devadas has an office on the 8th floor of Stata. When we sat down to chat there on Monday, July 9th, he started with an enthusiastic endorsement of MIT’s most famous building.
Thursday, July 12th, 2012
It may be summertime, but the folks in the Verification world are clearly not taking any holidays.
This week, four different verification-related news announcements arrived, presenting an interesting set of positive mid-year perspectives: Breker’s new round of funding, EVE and Synopsys’ co-emulation success, Cadence’s beefed-up PCIe VIP, and a new co-simulation interface from Aldec and Agilent. Good news on all fronts and now these folks should take a vacation!
Wednesday, July 11th, 2012
The concept of a Grand Challenge is an established one in engineering, so here in 2012 what are the Grand Challenges in EDA? Let’s go out on a limb and name a few candidates:
No.1) Low power: This is the critical problem here in the era of mobile everything. If you can’t guarantee low power for your device, it’s going to go dark way too soon and be way too hot in the meanwhile. Great challenges remain in perfecting the tools to make this all happen.
No.2) Formal verification: There just has to be a way to guarantee that what we meant to design, has been designed and then manufactured. Isn’t that the goal of formal verification, and isn’t it true that we’re not quite there yet?
No.3) 3D-ICs: In the last several years, this one’s gotten a lot of attention, but it appears that there’s still a lot of work to do – at least on the logic side of the equation. Clearly more tools are needed.
Tuesday, July 10th, 2012
It’s stranger than fiction, but there are actually two different entities at DAC that bear the name BDA, and they’re both acronyms.
One is a company very familiar to the EDA space, Berkeley Design Automation. As you know, President & CEO Ravi Subramanian has just been elected to a second term as a member of the Board of Directors of EDAC.
Subramanian’s BDA is in the news again this week because they just announced that ATopTech, also an EDA company, is now using BDA’s Analog FastSpice to “enhance the accuracy of the timing analysis in [ATopTech’s] Aprisa P&R product for designs at advanced process technology nodes such as 28nm and 20nm..”
So what is the other BDA at DAC? It’s Biological Design Automation. The International Workshop on Biological Design Automation figured large on Sunday and Monday, June 3rd and 4th, in San Francisco where it was again co-located with the Design Automation Conference, as it has been for several years.
Thursday, July 5th, 2012
The SI landscape is a confusing one: What is the true value of a signal integrity analysis tool, and if you’re an EDA vendor, do you need to offer an in-house SI solution to be a true end-to-end provider?
Although Cadence has had a position in signal integrity with their OrCAD Signal Explorer [pre- and post-route topology exploration and transmission line analysis, conceptual, pre-design/schematic topology exploration and simulation, routed or unrouted board topology extraction and analysis] …
… this week Cadence announced it has acquired Silicon Valley-based Sigrity and will now incorporate Sigrity’s PowerSI [full-wave electrical analysis for IC packages and PCBs, identifies trace and via coupling, power/ground bounce, and design regions that are under or over voltage targets] and SystemSI [chip-to-chip signal integrity analysis, including parallel bus analysis and serial link analysis, frequency domain, time domain and statistical analysis] into Cadence’s flow.
This all sounds great as a strategy for beefing up Cadence’s SI offerings, but what does it do to Sigrity’s current set of partners: Apache [owned by Ansys], CST, Mentor Graphics, Synopsys’ HSPICE, TSMC, and Zuken?
Thursday, June 28th, 2012
The week of Fourth of July in the U.S. is a short work week and one where most people are on vacation, or at least thinking about it. So let’s take a break from the day-to-day stress of work and worry, and think about other things as well – things like innovation.
The following was first published in October 2011 in EDA Confidential, just a few days after Steve Jobs passed away.
Pop Pop iPop …
Over the last 60 years, three wildly different anarchists have grabbed the Common Man by the throat, forced him to take off the blinders, stop signing on the bottom line, and cease obsessing about crossing those damn t’s or dotting those accursed i’s. In so doing, these three more than any others of their time redefined the modern zeitgeist and created 20th Century Man, a hominid unrecognizable from any that came before.
And, because the risks of fomenting chaos often – and perversely – generate great rewards, these guys also raked in an outsized share of the cosmic pie and were anointed, respectively, Prince of Pop, King of Pop, and Potentate of iPop.
It wasn’t all goodness and light, however; the Fates insisted on having the last word in the unscripted and tumultuous glories of the three. Clearly flying too close to the sun, not a single one of them lived to see a 60th birthday.
Tuesday, June 26th, 2012
Over the last few weeks, quite a lot of things have happened here in the Bay Area: some expected, some unexpected, some uncanny, and some downright Uncanny Valley.
For instance, it was expected that the Bay-to-Breakers would run early on May 20th, but unexpected that the weather would be so lovely on that morning. It was expected that a solar eclipse would happen just before sundown on the same day, but unexpected that the weather would hold out so millions in the Bay Area could see it. In other words, no fog in the morning or the afternoon.
It was expected on May 27th that the 75th anniversary of the opening of the Golden Gate Bridge would be celebrated with extraordinary fireworks, but unexpected that the fog hovering off the coast should wait until just after the fireworks display to finally enter in through the Golden Gate.
Thursday, June 21st, 2012
Despite all the press and buzz around cars like the Tesla, EVs (electric vehicles) are nowhere close to becoming a widespread phenomenon.
First of all, the battery technology at the heart of the EV power train is still problematic. The batteries are heavy and take up a lot of space. Lithium-ion batteries – the type most popular in electric vehicles – are flammable, although electric vehicle enthusiasts argue that gasoline is also volatile. EV batteries are extremely expensive to replace, tens of thousands of dollars for a complete pack, and must be swapped out after 100,000 miles of use. Finally, a fully charged EV will only go about 100 miles* before the charge is depleted, a problem compounded by range anxiety. EV owners are reluctant to let their batteries drop below a 50-percent charge, so are unwilling to venture farther than 50 miles between chargings.
Wednesday, June 20th, 2012
The news crossed the wires at 8:00 am this morning: Atrenta announced it has acquired NextOp Software, “allowing Atrenta to expand its de-facto standard SpyGlass RTL platform to include functional verification using NextOp’s patented dynamic assertion synthesis technology, and creating a more complete SoC Realization platform.” Financial terms of the transaction were not disclosed.
With the acquisition, NextOp President & CEO Dr. Yunshan Zhu becomes VP of New Technologies reporting to Atrenta Chairman, President & CEO Dr. Ajoy Bose. NextOp Co-founder & CTO Dr. Yuan Lu becomes Chief Verification Architect reporting to Zhu.
EDA luminary Jim Hogan is quoted in today’s Press Release: “I’m glad to see private/private acquisitions like this happening again after such a long dry spell. Atrenta could be leading a trend in renewed growth for the EDA sector.”
I spoke by phone with Ajoy Bose and Yunshan Zhu earlier in the week about the upcoming announcement.
Thursday, June 14th, 2012
Everybody loves the phrase, Four Horsemen of the Apocalypse, but usually don’t remember the specifics. According to Wikipedia, the horsemen each ride a steed of a different color – white, red, black, and pale – and thunder towards us bearing apocalyptic messages of Conquest, War, Famine and Death. You know: The stuff of video games and CGI blockbusters. Ignore them and you lose.
This year at DAC, GSEDA analyst Gary Smith presented his own apocalyptic message in back-to-back presentations on Sunday evening, June 3rd, and again on Monday morning, June 4th.
Why was Smith’s message apocalyptic? Because he too had four horsemen, and they too cannot be ignored. Without them, products will fail. It’s that simple.
Smith’s horsemen are neither rapacious nor ravaging, however. Instead, they represent the methodical four-step process for co-development of hardware and software, which if done properly moves to completion in carefully controlled lock-step and produces successful results.
Replacing Apocalypse with Approximation, Gary Smith’s Four Horsemen of the Approximation represent Design Exploration (not Conquest), Making Apps (not War), Firmware (not Famine), and Sales & Marketing (not Death).