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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

HAPS-70: a distinguished provenance

November 12th, 2012 by Peggy Aycinena

If you’re an IP developer, or somebody who develops SoCs where blocks of IP land, Synopsys is announcing a product today that will be of interest: the HAPS-70 Series. It’s a prototyping system with a distinguished provenance that runs your ASIC-targeted design on FPGAs for validation prior to tape-out.

HAPS-70 started its journey to your work place way back in 1987 when Sweden-based HARDI Electronics was founded. The folks at HARDI developed the original HAPS prototyping system, which became part of Synplicity’s arsenal in 2007 when HARDI was acquired by SYNP, and the product was relaunched as HAPS-54.

Gary Meyers was President and CEO of Synplicity at the time, and was quoted: “This is a major strategic move for Synplicity. We will be able to immediately leverage our existing ASIC verification products (Certify, Synplify Premier, Identify, and Identify Pro) by selling them together with the HARDI ASIC prototyping boards.”

Then as you remember, Synplicity was acquired by Synopsys in 2008. Hence here in 2012, you have the opportunity to buy a product named HAPS-70, which not surprisingly is still seamlessly integrated with Certify et al, all of which are now part of Synopsys’ armamentum.

Meanwhile, it’s of some interest that Gary Meyers became one of the Carl Icahn nominated members of Mentor Graphics’ Board of Directors in 2011, so his original endorsement of the HAPS system adds measurable credence to the strength of the technology.

So what’s so great about HAPS-70? Per the press junket hosted by Synopsys Product Marketing Director Mick Posner and Product Marketing Manager Neil Songcuan

HAPS-70 is providing 3x prototyping performance increase over previous “traditional” technologies, it automatically parses your nascent design to distribute it in a rational manner over the various FPGAs at the heart of the HAPS-70 system, it beats the current John Henry manual method of partitioning used by ASIC developers, and perhaps most importantly [my sentiment, not Posner/Songcuan’s] addresses the thermal issues that have been so problematic in previous FPGA-based prototyping systems with cunningly designed heat sinks, etc., and therefore can accommodate designs with up to 144 million ASIC gates. Also, the newly released HAPS-70 system offers “external debug storage [capacity] with 100x greater visibility [which allows you to] debug your design, not your prototype.”

Given all of this, what are you waiting for? From HARDI to Mentor Graphics, from Synplicity to Synopsys, the endorsements for the technology are gold. Give Synopsys a call and find out what solutions HAPS-70 may offer for your prototyping problems.

And by the way, if you find out how much the thing costs, let me know. To Mick Posner and Neil Songcuan’s credit, they wouldn’t tell me when I asked.  They did let me know, however, that the HAPS-70 system has been in beta with “a number of early adopters” since January of this year.


HAPS stands for High Speed ASIC Prototyping System.


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