Open side-bar Menu
 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

MathWorks: the elephant in the room

July 18th, 2012 by Peggy Aycinena

To get to MathWorks’ corporate headquarters outside Boston, take the Red Line to the Orange Line to Back Bay Station. Take the Commuter Rail to Natick, cross the bridge over the tracks, walk north along leafy Walnut Street for a mile and a quarter, turn left onto Route 9, and cross the grass to Apple Hill Drive. Turn left into the parking lot of the company’s campus, pick your way through the construction going on there, and look for the main reception building across from the big parking structure.

If you do all of this, and it’s 90+ degrees with 60% humidity, you’ll be totally drenched by the time you walk into the cool of the MathWorks headquarters. But no worries; the very nice person at the reception desk will send you down the hall to the closest break room where you can get a tall drink from the beverage dispenser and bring it back to the reception area to rest, recuperate, and prepare for your meeting with Ken Karnofsky.

Okay, two points of interest here: a) MathWorks is different. It’s headquartered in a residential neighborhood, not a commercial park; and b) the welcome is relaxed and not the high-pressure stuff of Silicon Valley.

Two additional points of interest: c) MathWorks is expanding. They’ve got 2400 employees currently, with an additional 200 job openings! Their Natick campus may offer a calm retreat from a humid Massachusetts afternoon, but it’s not a calm retreat from the world because when you’re there, MathWorks feels to be at the center of the world.

And d) MathWorks is definitely an EDA company, even though they don’t belong to EDAC and they don’t exhibit at DAC (although they have exhibited in the past). If you design chips, MathWorks’ MATLAB and Simulink is the gateway into your design. When it comes to EDA, MathWorks is most definitely the elephant in the room.


An interview in Natick …

Ken Karnofsky
is MathWorks’ Senior Strategist for Signal Processing Applications. I have met Ken multiple times at DAC, in those years when MathWorks was exhibiting, and it was good to meet with him again. We talked for over an hour on Thursday, July 12th.

WWJD: How did the company end up here in Natick?

Ken Karnofsky: Cleve Moler [Chief Scientist] and Jack Little [President & CEO] started the company in Silicon Valley in 1984, moved it to Natick in 1986, and here to our current location in 1999. Cleve developed MATLAB for linear algebra and matrix algebra, Jack configured it to run on a PC and had the idea to start a company [based on MATLAB], and things went on from there. Simulink is our block-diagram tool, introduced in 1990, for modeling non-linearity and is used for control systems and model-based design.

MATLAB is widely used, while the modeling features in Simulink are useful for everything from PLLs, to data converters, to the system-level paradigm. Chip designers aren’t the only ones using Simulink, of course.

It’s used by every major auto manufacturer and Tier 1 supplier who needs system simulation and solutions to many general problems. From the Freescale’s and Infinion’s of the world, to the automotive and flight-controller market, they all model in Simulink.

WWJD: When did MathWorks first get wind of the significance of their tools in chip design?

Ken Karnofsky: It was around 2000, when the algorithms became more important. A broad range of people were using our products doing algorithmic development and conceptual design. Then, when Simulink got powerful enough, the chip-design community started asking: How do we get from MATLAB and/or Simulink to GDSII?

WWJD: Is it possible to go straight from MATLAB to RTL?

Ken Karnofsky: In 2006, we had a major launch of a tool called HDL Coder which generates synthesizeable HDL, VHDL or Verilog, and we also took pains to make it [relevant] to FPGA users. Through the workflow advisor feature, it generates code synthesizable down to Xilinx or Altera parts.

We can also generate portable C code [using MATLAB Coder] and TLM components [using HDL Verifier] for Incisive [Cadence] or Questa [Mentor] simulators, which is important in the growing area of model verification: Does your algorithm and physical implement reflect the design requirements?

WWJD: How do the MathWork tools ‘dovetail’ with SystemC?

Ken Karnofsky: SystemC solves this problem: Can you verify the architectural correctness of the chip?

But MathWork tools are about solving bigger problems, the chip as part of a bigger system. We provide the capability to verify the overall system, and see if it does or does not work. We also solve smaller problems: If you have an SOC, and are worried about integration of some amount of custom IP blocks, [we contribute] to that solution.

Also, C is the language behind SystemC and was [developed] for system-level design. But SystemC may not follow the language when IP is being created, especially in mixed-signal and data converter design.

WWJD: I think this can be confusing. Are your tools complementary with system-level tools from a company like Forte?

Ken Karnofsky:  We both produce RTL, it’s true, but there are few circumstances where we [interact]. We could be complementary, but there is no flow.

Forte’s Vision is that the system is an SoC composed of various hardware and software components. Understanding it requires standardizing on how to describe and verify the chip, which looks like SystemC and is therefore about EDA. From the chip architecture point of view, and IP-creation point of view, the SoC does have many reusable parts, and we agree [with the industry] that standardization is key.

MathWork’s vision, however, says there is tremendous value in validating the behavior in the design – the algorithms and the system component interaction – especially prior to making architectural decisions. So our approach is [one of] model-based design through a sequence of abstractions – first a reference for the design, and then a testbench – which can map to a variety of different implementations.

WWJD: So if not Forte, who is your competition?

Ken Karnofsky: There is some overlap with products that do high-level systems design, companies like HL Systems, Synopsys’ System Studio, and Agilent’s EEsof tools. But there’s really not much competition. Most of it is pretty complementary.

WWJD: So, I know you’re no longer exhibiting at DAC, but what about other shows?

Ken Karnofsky: We used to be at DAC, but like many other trade shows, it is not as effective as other methods of reaching our customers. Now we have MathWorks user conferences in Europe, Japan, Korea, India, and North America, and sometimes exhibit at [select] trade shows.

We also are a very active sponsor of various student competitions, with many of our employees in the field specifically dedicated to supporting universities.

WWJD: And other marketing outreach?

Ken Karnofsky: MATLAB Central in online and [represents] an  extremely active user community across a range of consumer groups. If you go to MATLAB Central, you’ll see a number of people are contributing code and examples, and answering questions for other users.

It’s been in existence for about 10 years now, and has helped streamline licensing of the code, plus a more transparent user experience, including a rating systems and a place where people can vote [on features]. There are blogs and a chance for users to help each other out.

WWJD: It seems MathWorks is like the elephant in the room in EDA, the EDA company that doesn’t see itself as an EDA company.

Ken Karnofsy: It’s true that MATLAB was developed as an abstract tool, so there is a lingering perception that it’s not part of the design flow. But chip designers can actually go much farther with our tools, working out prototyping issues: If we do this project, we can do that?

A lot of what we do is about empowering small design teams to get things done quickly – proof-of-concept things before a project is started. That’s pretty powerful. It reduces the risks for suppliers and customers [at the outset of a project].

It’s important for chip designers, but also important for any number of problems that are algorithmic in nature.


Additional reading …

Jack Horgan interviewed Ken Karnofsky on EDACafe when HDL Coder was announced in 2006.

2) Design example using MATLAB and SystemC: “Accelerated Verification of a MATLAB-Driven Digital FIR Filter RTL Design” by John Stickley and Wade Stone in Chip Design Magazine

3)  Per Synopsys website touting SPW: “Implementing complex digital signal processing systems for consumer, infrastructure, medical, automotive and aerospace and defense companies is the key challenge for innovation, since most of the design time is spent on investigating the effects of individual implementation decisions on the performance of the entire system. Pure language based approaches (MATLAB algorithms or C/C++) fail at these challenges as they do not constrain the modeling approach enough to improve implementation and simulation productivity.”


Tags: , , , , , , , , , , , , , , ,

Leave a Reply

Your email address will not be published. Required fields are marked *



DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise