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 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

49DAC Unplugged: Tiempo, SypherMedia, SOCtronics, SkillCAD, Ausdia

June 11th, 2012 by Peggy Aycinena

This is the third in a series of blogs describing conversations with small companies that exhibited at 2012 Design Automation Conference in San Francisco, June 4th to 6th.

Since I published the Monday@DAC and Tuesday@DAC blogs, both Dan Nenni and Mike Demler have published attendance numbers for the conference. Interesting that the two sets of numbers see the same cup as either half-full or half-empty.

Per Nenni, the cup’s half-full when comparing DAC 2011 in San Diego to DAC 2012 in San Francisco: “Conference attendees were up to 1901, up 9% on last year. But exhibits only passes were way up to 2783, an increase of 39%. Even booth staff was up 11% to 2704.”

Per Demler, however, the cup’s half-empty when comparing DAC 2009 to DAC 2012, both in San Francisco: “Conference attendees remained essentially flat compared to the last San Francisco DAC, at 1,962 in 2009 versus 1,902 this year. Exhibit-only attendees dropped by nearly 20%, from 3,337 three years ago to 2,703 in 2012. It is interesting to note that Booth Staff actually increased slightly, from 2,697 to 2,704.”

Demler added: “An analysis of the DAC exhibitor list reflects many of the changes that have occurred in the industry. Fewer than 100 companies on the show floor, approximately half of the exhibitors, actually develop design tools.”

Demler also observed that PDF Solutions, a company whose CEO is on the EDAC Board, did not exhibit at DAC 2012. PDF Solutions does not consider itself a design tool company, however – see my interview with John Kibarian here – so even had the company exhibited that may not have alleviated concerns.


Each year, both Gary Smith and John Cooley provide a “Must See” list of companies they recommend attendees seek out and talk with at the Design Automation Conference. DAC 2012 was no different: Gary’s 2012 list had 27 companies and Cooley’s had over 80. Short of one, all of the companies on Gary’s list also appeared on John’s.

However, there were almost 200 exhibitors at DAC in San Francisco, so clearly many companies exhibiting were not on these lists which made for an interesting exercise: Go out onto the Exhibition Hall floor and only talk to companies who are not on the lists.

That’s what I did each day in San Francisco, walking up to booths without an appointment and in the process finding a host of articulate technologists, and their enterprises, which seem to exist under the radar at DAC. On Wednesday, June 6th, I spoke with 5 of them.


Steve Svoboda is Vice President of Business Development at Tiempo, a company based in San Jose. He told me Tiempo was on John Cooley’s list last year, but “nobody nominated us this year.”

And how did the company get on the list last year? Steve said, “We had a product announcement around our clockless logic synthesis, Asynchronous Circuit Compiler. Using our tool, timing closure doesn’t matter any more.”

So is Tiempo announcing something this year? Per Steve: “We are announcing a pilot project with STMicro at 32 nanometers to do micro-controller test chips where we are getting 100% yield.”

Steve said Tiempo is unique: “There are no vendors today offering a clockless logic synthesis tool. We’re the only company that does clockless, an idea that many see as still in the very early stages. Up to now, people haven’t seen enough dire need to look at clockless digital logic.

“Most chips today run off one or more clock domains, so standard clocked chips require a lot of timing analysis to keep all of the processing synchronized. But clockless chips dispense with that, so timing analysis is no longer required. How does it work? Instead of using a clock signal to sync, we use handshaking between all of the logic.”

Why is that better? Steve said, “Because it let’s you cope with variabilities in delay, so they don’t matter anymore. We believe in 5 years everybody will be going with this [strategy].

“Earlier this week, we saw on article describing what we’ll need at 10 nanometers, looking in particular at the variabilities people are predicting at that node. We expect a sizable fraction of those designs will be implemented using clockless logic. In particular, companies like ST will want to look at using clockless logic as test vehicles to characterize performance and variability.

“I don’t know what Intel is looking at right now, but we do know from rumors in the industry that they have whole teams looking at clockless design. We’re not privy to any of the details, but we expect that a lot of those folks are seeing the same sort of issues, maybe even more.”

And does the strategy have validity at 22 nanometers? Steve said, “Even at 22 nanometers, it becomes more attractive. Intel can afford not to do it at this point because they can optimize their designs in other ways, with large volumes and large teams so they can amortize the costs. Plus, they have proprietary tools to do certain kinds of analysis. Meanwhile, however, Tiempo is looking forward to working with ST and Global Foundries going forward to help with the problem.”

Steve added: “We’ve noted there is fascination here at DAC with clockless today, even though the concept’s been around for a long time. It goes back to the 1940’s and the era of vacuum tubes. There have never been the tools to make it automatic, however, but that is our claim to fame: The first automated clockless synthesis tool – with a key difference. We’re integrated with Cadence and Synopsys for the back-end!”

SypherMedia International

Based in Westminster in Southern California, SypherMedia was a first-time exhibitor at DAC. I asked Design Manager Bryan Wang what made the company decide to come to the conference.

Bryan said, “We have a strong history with the pay TV industry, but have been trying to expand out of that industry by attending conferences. We’re a small company, in business since 2003, and have previously come to DAC as attendees. This year, we decided to attend as an exhibitor to expand our marketing, which has been [principally] word of mouth until now. ”

I mentioned a technical session I attended on Tuesday at DAC on Cyber counterfeiting. Bryan said that exactly dovetails with his company’s focus: “SypherMedia provides hardware IP protection from reverse engineering. Our customers fall into various categories: smart cards, broadcast security ASICS, and consumable electronics such as printer cartridges. All of these people have counterfeiting problems.”

Bryan said the company may be new to DAC, but exhibits regularly at anti-tamper conferences. I asked him to define anti-tamper.

He said: “It is anything that prevents the modification or analysis of an electronic part in the field, and has a couple of different aspects. There’s the resupply aspect, where the replacement part is not up to the original quality standards of the part, and there’s the aspect of mal-intent – people buying up cheap replacement parts and selling them for a lot of money.

“We provide a solution for ASIC designers to protect their hardware IP from reverse engineering, counterfeiting, or unauthorized modification. We design cells for our customers that [in optical analysis] look like standard logic cells, but in fact do a different function, or are completely non-functioning. In other words, we make the layout look like something it isn’t.

“The chip is then protected from automated optical imaging, automated reverse engineering which ‘sees’ something, and from that produces a netlist. So what was a 1-to-1 relationship between image and function, is now no longer 1-to-1. People may then resort to probing every gate on the chip instead [to determine functionality], but in fact few people realistically have the time or energy to do that.

“Our technology is part of an effort to solve what has become a multi-million-dollar piracy problem, not only in the broadcast industry, but across the entire semiconductor industry.”


SOCtronics is a design services company based in Hyderabad. I spoke with Director of Operations Sridhar Yarlagadda, who told me the company’s been in operation for 6 years in India and has just opened a new office in Santa Clara.

Per Sridhar: “SOCtronics provides senior engineers who do projects and program management in digital and mixed-signal design – everything up to GDSII. When a customer has a large project which has significant resource requirements, a company like ours with over 300 engineers can provide a rush of [personnel] to ramp up rapidly.”

He said the company is extremely effective working remotely with a set of international customers. For customers based in North America, however, the new office in Silicon Valley will “make it easier to have someone here to interact with.”

I asked Sridhar why the company exhibits at DAC. He said, “It’s valuable for us to be at DAC because whoever comes to see our booth has a serious reason [for visiting us]. We are talking to people here about our expertise, everything from 100 million gates to 20 nanometers.”

Sridhar added, “We work in two ways. We provide turnkey services where the customer provides the specs. In our other model, the customer hires a number of our engineers, we provide the facilities and a secure network for the project, and they provide the management. We don’t mind if a company comes in and says they’ll [engage] with our engineers for 3 to 5 years.

“We have experience providing large teams of people, sometimes as many as 75, ranging from director level down to junior engineer. This is very useful for the customer starting up an entire operation, and can help reduces the stress of a company working in a foreign country.”

Can he reveal the names of customers? “No, but among them is one of the largest international processor companies.”

I asked Sridhar how SOCtronics hires into the company. He said, “We conduct recruitment tests and interviews for young engineering coming out of school, often IIT Hyderabad. We also provide practical training for university students [while they are still in school], so when their engineering education is done and if they meet our standards, they can join us right out of school. We have an extensive training facility of our own, so their education continues with us.”

SkillCAD …

This is the 4th year that SkillCAD, a company based in San Jose, has exhibited at DAC. Company President Pengwei Qian told me SkillCAD provides a set of niche tools, including their IC Automation Layout Suite: “Most tools are developed from the software point of view, but ours are developed from the point of view of the user.”

Pengwei said he feels it’s important for his company to be at DAC, but exhibiting comes with some frustrations: “The big companies can afford to have a drawing every 15 minutes or so, giving away a camera or an iPad, but the smaller companies cannot compete with that.”

Even without drawings, however, Pengwei said it’s expensive for small companies to exhibit at DAC – yet if they don’t there’s a concern people will somehow believe the company’s no longer active in the industry.

I asked if this is why SkillCAD comes to DAC. He said, “No, we come to DAC to promote our products. Also for us, it is important because we have a good chance here to see our customers from Asia.”

And how does SkillCAD get customers to visit the show? Pengwei said, “We send emails to customers and invite them to come see us here, which is always very effective.”


Its name taken from the home countries of the founder and CTO, Australia and India respectively, Ausdia was founded in 2006 and is based in Sunnyvale. The company focuses on on timing constraints, verification and CDC analysis.

I spoke with Director of Field Engineering Hollis Robertson in the company’s booth at DAC. Hollis told me Ausdia’s customers are the large semiconductor companies. I asked why they don’t do this work for themselves and he said, “Because it’s complex and iterative, and we can do it automatically.

“Using our tool, Timevision, our engineers solve the CDC problems of customers whose designs have become very complex, sometimes with thousands of clocks. We help them deal with timing constraints automatically, and in minutes, where on their own they would have been attempting to solve the problems manually.”

I asked if Ausdia is a services company or a tool provider, and who is the competition. Hollis said, “We sell the tool and training, but Timevision feels like an STA tool so the training is actually very short. Our competition is FishTail, Atrenta is some areas, Real Intent, and to some degree Blue Pearl.”

If there are so many players in this niche, why do it? Hollis said, “Because our founders were consultants first, and saw a lot of problems that weren’t being addressed by our competition – particularly in scalability and the sheer size of these SOCs. So they decided to launch into this market and hired software architects to develop the product.”

And what has Ausdia’s experience been at DAC 2012? Per Hollis: “It’s our third time at DAC, and we’ve been getting a lot of traffic here in San Francisco. Anyone who comes by gets a PowerPoint presentation and an overview. If they want more details, however, the demo suites have been very useful, and better. There the customers feel more secure about giving us information about their problems.”


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