Uniquify: The Vision is crystal clear
May 31st, 2012 by Peggy Aycinena
If Silicon Valley is all about articulating and executing on a vision, then Santa Clara based Uniquify is all about Silicon Valley. The company has been in business since 2005, and since that time has worked to crystallize and clarify its vision and road map.
The vision is succinct and to the point: Make creating chips easier and faster, and with better results.
And from what I heard on a lengthy phone call today with Uniquify CEO Josh Lee, the company thinks they’ve nailed it, realizing that vision in three distinct ways. Per Lee, “Number one is design services. With us this is a different beast than in the usual sense in that we start from a spec or idea from our customer, and take it all the way to GDS.
“In the past, design services – which emerged in the mid-1990s when the industry moved from the ASIC to the COT model – were either dealing with logical design or phsycial design. At Uniquify, however, we are doing them both together. As a result, our core business is best described as ‘from spec to GDS’.
“Number two in our vision, and of equal importance, is our IP Division which is an important [corollary] to design services. Our IP products are in the area of DDR memory subsystems, based on a brand new idea I had even before I started this company about how to make DDRs better.
“I knew at the time that DDRs would be the single most important class of IP, and believed my idea was patentable. That has proven to be the case: Uniquify has one patent in place already, and another patent pending on our DDR IP blocks. So we have design services on the one hand, and IP on the other – both parts of our vision.
“Number three, we offer what was referred to in the old days as a ‘turnkey’ business model. We take the GDS we have helped develop, and then negotiate with the foundries to deliver fully tested parts to our customers. We put our margins – royalties, if you wish to call them that – on every chip, and use the term ‘Platform Services’ to describe this foundry interaction.
“This completes our vision: We start from the logical side, work through the physical side of design, include the IP, and then work all the way through to the foundry and the test chips.
I asked Josh Lee if he is aware of the company, eSilicon.
He said, “Yes, they are one of our competitors, along with OpenSilicon and GUC, in which TSMC has an ownership stake.
“At Uniquify, we’ve done research on all three of these guys and feel that when you really look at them, they’re actually using the old ASIC business model – something like LSI used at one time, which offers neither flexibility or transparency.
“Now we see these competitors starting to look very closely at us, and attempting to modify their business models to follow us. At Uniquify, we have the vision and now others are trying to follow it!”
In light of Cadence’s recent promotion of EDA360, I asked Lee how his vision compares to Silicon Realization, SoC Realization, and System Realization.
He said Uniquify is very clear, they are not working at the system level: “These types of terms, however, are not new. Twenty years ago, people were talking about a black-box type of silicon compiler that would allow you to get a chip out within a few months from start to finish.”
He added, “Today, we have made incremental advancements towards that grandiose process, but there hasn’t been an actual paradigm shift. Instead, the industry has been so busy going after tapeout after tapeout it hasn’t looked closely at some of the things that need to change.
“In our vision, it is no longer about the grandiose silicon compiler. Now it’s about IP, about a language called Verilog, and about the tools and flows – the whole process of thinking and putting things together at the architectural and micro-architectural stage.
“Already today, 50 to 70 percent of the SOC is IP, yet there is no standardization for integrating that IP. If you buy from a third-party vendor, you have to read the data sheet, understand it, and then get into the RTL code to see how it hooks up to your bus or into the overall chip.
“In our opinion, there’s a much better way, which is to undestand the IP from the point of view of the initial spec. We see it as a lot of low-hanging fruit, and an opportunity for significant savings for the customers – to get close to the whole concept of the proposed chips, to take the many pieces in hand and streamline the process.
“Our vision will be moving us very close to the idea of Silicon Platform Services; this is the direction where we are headed. It will be a [distinct] paradigm shift that includes IP, the Verilog language, the tools and the flow.”
Given his confidence, I asked Lee about the company’s exit strategy.
Lee said, “At this point, we have almost 95 employees, are totally self-funded with no VC money or angels of any kind. We have grown with a CAGR exceeding 40%. In fact, FY 2012 represented a record year for us in terms of both revenue and profit. And, we see that trend continuing – business is great, but in the current economic conditions is not good enough for an IPO, which would be our first choice.
“Our second choice, similar to other start-ups, is that a big company looks at us, sees that we are doing interesting things, and acquires us.
“However, we really believe we can conquer the world, so our third choice – the one most aligned with our vision – is that we take no exit at all. Instead, we go forward like an Intel, an IBM, or an HP, find our niche in the market, and make a real impact on the industry.
“Prior to the 2008 downturn, potential customers were saying, ‘You look great, but you’re the devil we don’t know.’ So they stayed with their traditional EDA design service providers. Now, however, they see that we have a more complete offering and can save them up to 25 percent of the costs of bottom-to-top design.
“Our design services are heads and shoulders above our competitors, we are providing better IP than our competitors, and our ‘turnkey’ or platform services complete our vision. Our customers see that our vision is one of optimism, and that our business is here to stay!”
You can experience Uniquify’s vision and confidence for yourself in Booth #1902 at DAC in San Francisco.
Tags: Cadence, DDRs, EDA Design Services, eSilicon, GUC, IP, Josh Lee, OpenSilicon, silicon compiler, Uniquify