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 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

Docea: the Power and the Story

 
May 22nd, 2012 by Peggy Aycinena

Docea Power, founded in 2006 in the Grenoble area of central France by brothers Ghislain and Sylvian Kaiser, now has an office headquartered in Silicon Valley. When CEO Ghislain Kaiser and I spoke by phone this morning, he talked about the company’s product offerings – in particular, those set to be showcased at DAC in San Francisco in early June.

Ghislain said, “AceThermalModeler is our new tool that is available for both architects and system designers [through which] they can create a compact thermal model for a proposed product.

“True, there are on the market today tools from Mentor [FloTHERM] and Ansys [Icepak] that do thermal analysis, but those tools need a lot of run time because they are not compact. The models they produce are accurate, but require hours and days of compute time.

“Docea’s AceThermalModeler, however, relies on fast computing – just seconds or minutes – so at the architectural and system level the design space can be explored quickly. [In fact], if we compare the models produced by our solution, we are within 5% of the models produced by Mentor or Ansys, so for a great deal of savings in time only a small amount of model accuracy is lost.

“Equally important, our tool is designed to be used by people who do not necessarily have specific expertise in the thermal topic. Early-stage considerations of the effect of temperature and temperature gradients can now be evaluated by architects and system designers. The thermal experts on the team have so many requirements to analyze from different design units within the company; they often don’t have the time to work on early-stage analysis.

“It is therefore huge that AceThermalModeler works quickly, provides sufficient accuracy in the models, and is accessible even to those who are not expert in thermal who can now work more autonomously on design-space exploration early on. All of this saves months in the product development schedule and [yields a faster] route to design.”

I asked Ghislain about the other product in the Docea’s armamentum.

He said, “Aceplorer is our original product offering and is still really unique in the market. It performs co-simulation between power and temperature, and deals with the growing problem of leakage current that [plagues] leading-edge process nodes today.

“That leakage current is very dependent on temperature, which is in turn dependent on power on-chip. The phenomenon is this: When the power goes up, the thermal effects increase, and leakage current increases.

“With thermal ‘runaway’, both the power and the temperature become unstable, which can lead to ‘burning up’ the chip. High power increases temperature, which increases runaway leakage current – a terrible loop due to the dependency [of these factors]. This is an exponential dependency that makes it impossible to stop the loop when the [situation] becomes unstable.

“By using Aceplorer, however, it is possible to anticipate these [instabilities] by looking at the best trade-offs between power and temperature, and cost, very early on in the design phase, and therefore minimizing the potential for leakage current and thermal runaway.

“Architects now have a degree of freedom: They can try out different power techniques and different combinations of design, so design space exploration [will yield] the right trade-offs and solutions to meet the design requirements.

“Additionally at DAC in June, we will be demonstrating how to connect Aceplorer to both SystemC and TLM platforms, to validate software and the impact of that software on a proposed architecture. This is very useful for architectural validation early in the design phase.

“I like to say the Aceplorer is [equivalent] to a virtual power platform, because with it you can look at all of the things that lead to power problems on the chip. Aceplorer proposes a model that presents the physical behavior of both the power and the temperature on a chip. It reduces leakage as well as dynamic current and improves the design and the end-product.”

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Docea Power will be in Booth #1702 at DAC.

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