What Would Joe Do?
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
DAC 2012: Terrible Tuesday in San Francisco
May 8th, 2012 by Peggy Aycinena
First there’s the opening session in the morning when a boatload of awards are handed out, followed by the 2012 keynote. The Exhibition Hall won’t open until these things wrap up, so other than company meetings or company special-product announcement breakfasts, you should be able to be in the main theater at Moscone from 8:30 to 10:00 am or so.
Of course, worst case scenario: The opening session at DAC is always video-taped, so you could watch it at a later date after it’s uploaded to the DAC website but that’s hardly ideal.
This year’s main address will be delivered by ARM’s Mike Muller, “comparing the original ARM design of 1985 to those of today’s latest microprocessors … how far design has come and what EDA has contributed to enabling … systems, hardware, operating systems, and applications.” Then Muller plans to talk about 2020, how to get there, and what it will be like when we do. Conclusion? This stuff’s better heard in person than tape delayed. Go to the opening session, and plan not to regret it.
Unless of course, you’ll regret missing the Cadence/LSI hardware-software system integration breakfast that’s listed on the DAC website. That one’s probably not taped, so you’re going to have choose, plus surely other breakfast meetings will crop up as well. Tuesday is always terrible this way at DAC.
After 10 am on DAC Tuesday, however, the going really gets tough.
The regular technical sessions begin and the content looks really good. Can’t list it all, but it includes among other topics: low-power design, data security, system-level simulation, 3D stuff you should know, volatile v. NVM, formal verification, NoCs, timing analysis, ASICs v. FPGAs, real-time intent recognition for prosthetic legs, models below 20nm, models at the system level, models of everything in between, and of course, the limits of scaling and when will we get there.
In other words, if all of the sessions listed here plus the ones not listed here were placed end-to-end, they would reach all the way to the moon and back. And if you could attend them all, so would you.
But that’s not all for Terrible Tuesday.
There’s also the University Booth buzzing away all day, plus massive content in the User Track, which is always extremely informative: Software, Firmware, Power, Circuits, Optimization, and the Kitchen Sink.
As well, there will be great conversations in the Pavilion Panel on the Exhibition Hall floor: Foundries talking about what they do best [manufacture], Jim Hogan & friends talking about what they do best [invest & win], Brian Fuller talking about what he likes best [dissecting a Chevy Volt], Kaufman Award winner Jim Solomon talking about what he did best [founding the EDA industry], and Analog/M-S/RF folks talking about what they design best [the tough part of the SoC].
Lastly, but certainly not leastly, there’s also the CEDA Lunch featuring Stanford’s Mark Horowitz, the IPL Alliance Luncheon, ACM’s Student Research Competition, the 200+ booths on the Exhibition Hall, and to top it all off — DAC 2012 Management Day with speakers from Xilinx, Realtek, PMC-Sierra, Atrenta, STMicro, Cadence, Applied Micro, and Cisco, organized by Synopsys’ Yervant Zorian.
Come’on. Really? Really?? How on earth is anybody supposed to be 12 places at once on Terrible Tuesday?
The answer is, nobody can.
So after it’s all over, at least plan to take time for a great dinner. Jump in a taxi and take the 30-minute traffic-congested ride across town to Ghiradelli Square and have a steak, some lobster, some native French bread, and a bottle of wine at McCormick & Kuleto’s. It’ll cost you, but oh well — at least the spectacular view out to the Bay and beyond is free.
So even if Tuesday is as taxing and terrible as always at DAC this year in San Francisco on June 5th, at least you can end the thing in style by drowning your sorrows in great food and wine.
That’s what I would do.
Tags: ACM, Applied Micro, ARM, Atrenta, Brian Fuller, Cadence, CEDA, Chevy Volt, Cisco, DAC, Design Automation Conference, IPL Alliance, Jim Hogan, Jim Solomon, LSI, Mark Horowitz, McKormick & Kuletos', Mike Muller, PMC-Sierra, Realtek, STMicro, Synopsys, Xilinx, Yervant Zorian
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