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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

Monterey: Top Ten @ EDPS

March 29th, 2012 by Peggy Aycinena

Here are the Top Ten reasons to be going to EDPS next week in Monterey:

10) Next week’s a lighter work week for most and the Monterey Peninsula is beautiful at any time of the year, but particularly in the spring.

9) The Electronic Design Process Symposium is in its 19th year, and everybody who’s anybody in EDA and its adjacencies has attended at one point or another.

Eight) The topics discussed at EDPS have always tracked the trajectory of the industry. In 2000, those topics included: deep sub-micron, distributed and web-based design methodologies, designer productivity, and maintaining modularity in an integrated design flow.

Here in 2012, technology evolution has driven a completely different set of topics: embedded processors, FPGAs, ESL, NUMA, EDA in the Cloud, Big Data and the Big Servers that serve them, low-power design, and 3d-ICs, among others.

7) Going to conferences is as much about conversations outside the sessions, as it is about presenting or listening within the sessions. EDPS is a boutique conference, where I promise you’ll have a chance for substantive conversations with the speakers, both inside and outside of the sessions.

6) The 2012 speaker list is top-notch. Check it out here, or read the list below.

5) DAC is coming up in San Francisco in June. The best way to prepare is to go to EDPS. The range of topics at EDPS provides a context within which to understand the broader conversation at DAC.

4) At EDPS, the speakers — no matter how vast their knowledge or experience — actually listen to each other.

3) EDPS General Chair John Swan and his team have been relentless in driving industry awareness about EDPS. Swan & Co. are really smart — they wouldn’t be pushing so hard if they didn’t think the conference worth their efforts.

2) Swan & Co. have also convinced the heavy hitters in EDA that EDPS is important: Sponsors this year include Cadence, Mentor, Synopsys, and Altera.

1) Monterey is beautiful at any time of the year, but particularly in the spring.

Okay … what are you waiting for?

I’m going to EDPS. Are you?


EDPS 2012 Speaker Roster

Mike Hutton: Altera

Sri Ganta: Broadcom

Frank Schirrmeister: Cadence

Tom Spyrou: AMD

Sangeeta Aggrwal: Synopsys

James Colgan: Xuropa

Hans Spanjaart: Altera

Don MacMillen: Nimbic

Kiron Pai: Intel

Azadeh Davoodi: Univ of Wisconsin

Naresh Sehgal: Intel

Gary Smith: GarySmithEDA

Ian Ferguson: ARM

Qi Wang: Cadence

Grant Martin: Tensilica

Jim Hogan: Vista Ventures

Riko Radojcic: Qualcomm

Arif Rahman: Altera

Steven Pateras: Mentor Graphics

Marc Greenberg: Cadence

Sandeep Goel: TSMC

Herb Reiter: EDA2ASIC

Steve Leibson: Cadence

Samta Bansal: Cadence

Dusan Petranovic: Mentor Graphics

Deepak Sekar: MonolithIC 3D

Steve Smith: Synopsys

Phil Marcoux: PPM Associates


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2 Responses to “Monterey: Top Ten @ EDPS”

  1. Steve Leibson says:

    Thanks for posting this Peggy. Every word you write is true! I too will be there.

  2. John Swan says:

    All true Peggy and glad you can make it this year. I’m proud of the broad industry lineup we have presenting this year:

    Altera • Broadcom • Qualcomm • AMD • Intel • ARM • TSMC • Synopsys • Cadence • Mentor

    I’m not sure if having an FPGA supplier is a first at EDPS, but Altera will be saying something from the new CTO’s office about using OpenCL for SoC design. Additionally, our 3D-IC Friday is a big hit and I believe it to be the only forum focused on the design flow aspect of 3D.

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