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Roberto Frazzoli
Roberto Frazzoli
Roberto Frazzoli is a freelance journalist based in Italy. He has been writing about electronics since 1987, contributing to various leading publications. He graduated in Electronics at Istituto Tecnico Industriale Aldini Valeriani (Bologna, Italy) and in humanities at the University of Bologna.

Major stories this week: AI startups, video technologies, reliability insights, acquisitions

April 12th, 2019 by Roberto Frazzoli

Over the last couple of weeks, several announcements confirmed the ever-growing interest for artificial intelligence. In the same timeframe, other significant news concerned video technologies, new solutions to deal with reliability issues, and acquisitions of semiconductors companies.

Intel investing in AI startups

Intel is obviously very active in the AI arena, with initiatives focusing on specialized companies and startups. Among them a collaboration with, a company that has created an open source machine learning platform. The first phase of this project focuses on accelerating technologies on Intel platforms, including the new second generation Intel Xeon Scalable processors. According to H2O, using the latest Intel platform has enabled to handle much larger data sets and drastically reduce training time, while allowing server consolidations. And four AI startups recently joined the Intel Capital portfolio: among them, SambaNova Systems (Palo Alto, CA) and Untether AI (Toronto, Canada). The Intel Capital investment in SambaNova is part of a $150M Series B funding round with additional participation from GV (formerly Google Ventures) and others. Founded by two Stanford professors, SambaNova is building an advanced systems platform to run artificial intelligence applications from the datacenter to the edge, with a ‘software-defined hardware’ approach that allows to leverage constantly-evolving software advances in real time, to further maximize hardware performance. The Canadian startup Untether AI received $13 million in Series A funding from Intel Capital and other investors. It is developing a new AI chip for neural net inference based on a ‘near-memory’ design, that eliminates the data movement bottleneck that costs energy and performance in traditional architectures. According to the company, the new architecture gets data to the processors at 2.5 petabits per second.

Leaders from the 14 companies joining the Intel Capital portfolio pose with Intel Capital President Wendell Brooks. (Credit: Intel Corporation)

Chinese AI companies attracting attention

The other two AI startups on which Intel Capital has invested are both Chinese: Cloudpick Limited (Shanghai, China), a smart retail technology provider; and Zhuhai EEasy Technology (Zhuhai, China), an AI system-on-chip design house and total solution provider. Another Chinese AI company making news recently is FABU Technology, that announced its coarse-grained Deep Learning Accelerator (DLA), a low power custom module that improves the performance of object recognition and image classification in convolutional neural networks. The DLA can be customized for a broad range of models, including the computation of high data volumes from cameras and sensors to enable high-performance object detection for self-driving vehicles. According to FABU, this DLA design presents high inference performance comparable to high-end GPUs, but with about 40x power consumption reduction. The FABU DLA test chip is manufactured with TSMC 28nm CMOS technology. The proposed DLA 2.0 is projected to perform object detection at more than 40 frames per second for 2MP (1920 x 1080) images. The power consumption of the entire SoC is expected to be 5 W.

Broadcast video gets new compression algorithms and new video-over-IP solutions

Artificial intelligence is in the spotlight, but other applications are quickly evolving as well. Among them is broadcast video, with innovations such as High Dynamic Range and ever-increasing definition. Due in part to the recent NAB show, several announcements over the past couple of weeks have involved new FPGA-based solutions for compressing video and for transporting it over IP networks. The Belgian company intoPIX, who co-develop the new video compression standard JPEG-XS, announced the release of their first JPEG-XS IP-cores for Intel and Xilinx FPGAs, and demonstrated a SDK that will accelerate JPEG-XS encoding and decoding for live production. The new SDK will offer sub-frame latency and bandwidth ranging from 125Mbps to 400Mbps for HD, from 500Mbps to 1.6Gps for 4K, and from 1Gbps to 4Gbps for 8K. According to the company, JPEG-XS is set to become the go-to solution for broadcast professionals that want to create bandwidth-efficient production workflows over IP networks. Other video-related news include Nextera Video and Adeas announcing that their ST2110 Video Over IP FPGA cores now support NMOS (Networked Media Open Specifications) IS-08 Audio Channel Mapping; V-Nova and NGCodec presenting their combined FPGA-based encoding solution, which claims great UHD video quality and encoding efficiency resulting in up to 50x cost savings when compared to traditional CPU software options; and Omnitek, a FPGA IP vendor, offering a 3D LUT for color space conversions and conversion between nonlinear gamuts, for applications such as ITU-R Recommendations 709/2020 and SDR/HDR conversions, chroma keying and artistic effects.

The intoPIX team who co-developed the JPEG-XS standard. (Credit: intoPIX)

Reliability insights from Israel

Reliability is set to become the number one requirement in future autonomous driving cars. In the meantime, two recent announcements suggest measures that can be taken on this front today – at chip level and system level respectively. ProteanTecs, an Israeli start-up company that invented an innovative solution for the prediction of failures in electronics, announced that it has completed a series B financing round of $35 million. The company developed a solution called Universal Chip Telemetry, a new language of inferred measurements for chip health and performance monitoring. The ProteanTecs solution uses a cloud-based platform combining data derived from proprietary agents embedded in chips, with machine learning and data analytics. This significantly improves chip and system production quality, while tracking operational reliability and alerting on faults before they become failures. A system-level proposal comes from the components distributor Digi-Key Electronics and the Israeli company BQR Reliability Engineering: the two partners presented a collaboration that will enable Digi-Key customers to easily compare different BOMs (Bill of Materials) from the point of view of MTBF (Mean Time Between Failures). The BQR's software solution, available in SaaS mode, makes sure the design meets the reliability goal early in the design process before manufacturing. With Pareto reports showing the most unreliable components, it will ensure the selection of components that balance reliability and cost. It will also provide measures for warranty analysis, design reviews, tenders, product datasheets, and design trade-offs.

Industrial and automotive applications spur acquisitions

Also over the last couple of weeks, two important acquisitions took place: Renesas acquired Integrated Device Technology (a historical Silicon Valley company, founded in 1980), and ON Semiconductor reached an agreement to acquire Quantenna. In both cases, one of the major goals of the acquisitions is a stronger offering in industrial and automotive markets. Renesas will now deliver a range of embedded solutions combining its microcontrollers, system-on-chips and power management ICs, with IDT’s RF, timing, memory interface, real-time interconnect, optical interconnect, wireless power and smart sensors. ON Semiconductor and Quantenna aim at low-power connectivity applications by combining ON’s expertise in highly efficient power management with Quantenna’s Wi-Fi technologies and software expertise.

Major themes at SEMI ISS Europe: EUV lithography ready for volume production, challenges faced by the European industry, semiconductor market outlook

April 5th, 2019 by Roberto Frazzoli

After a 33-year incubation, EUV lithography is finally ready for volume production: Samsung and TSMC will start using this technology to process more than 1,000 wafers per day – at 7 nanometers – during 2019. The announcement came from ASML – the Dutch company that developed the EUV lithography equipment – on occasion of the European “Industry Strategy Symposium” organized by SEMI, the global industry association representing the electronics manufacturing supply chain. This year the event took place in Milan, Italy, March 31st to April 2nd, and offered a picture of the challenges and opportunities facing the semiconductor industry in Europe.

Back to single patterning

Peter Jenkins from ASML summarized the long run that lead to EUV lithography, starting from the early researches in 1986 when this wavelength band was called “soft X-rays” – it was then re-branded “extreme ultraviolet” in 1993. A major boost came from the co-development agreement signed in 2012, when Intel, Samsung and TSMC joined ASML to provide additional resources. But a key piece of the puzzle was still missing to reach full scale productivity: a powerful EUV source. This roadblock was removed in 2013, when ASML acquired its EUV source supplier – Cymer – to help R&D on this front. Now, with 250-watt sources available, everything is in place. Jenkins stressed that EUV lithography allows to use single patterning even for the most advanced process nodes, thus reducing the manufacturing cost that has soared over the past few years due to double- and quadruple-patterning.
Read the rest of Major themes at SEMI ISS Europe: EUV lithography ready for volume production, challenges faced by the European industry, semiconductor market outlook

Major themes at DATE Conference: autonomous driving, post-CMOS technologies, Design for Inspection

March 29th, 2019 by Roberto Frazzoli

Juergen Bortolazzi. © DATE 2019

Risking to miss your flight? Save time at the airport by letting your car find a parking place by itself. Much like valet parking, but without a valet. This is the goal of a project from the Volkswagen Group, that Jürgen Bortolazzi from Porsche described in his opening keynote at the DATE Conference – which took place in Florence, Italy, March 25th to 29th.

Autonomous driving was one of the key themes at the European event on design and test this year, and it echoed on many other speeches and debates during the conference. Bortolazzi observed that there is a gap between the current SAE level of driving automation, L2 (ADAS systems) and the next level L3 (real autonomous drive), therefore he predicted an intermediate level L2+ with more advanced ADAS. But getting to L3, he pointed out, will require major reductions in cost and power consumption. Autonomous drive takes a huge number of expensive sensors, and such a big amount of on-board processing power that – with the current technologies – car electronics might require water cooling. Bortolazzi also highlighted that China is very well positioned in the quest for autonomous driving, thanks to a comprehensive plan from the Chinese government that includes a regulation framework.

Read the rest of Major themes at DATE Conference: autonomous driving, post-CMOS technologies, Design for Inspection

Major stories this week: market reports, Synopsys, SMPSs, AI acceleration, batteries

March 23rd, 2019 by Roberto Frazzoli

Market research firms released new reports this week offering outlooks on three key industries; among them EDA, where Synopsys is making news with several announcements. Also, recent or upcoming conferences and trade shows are attracting attention on AI acceleration in servers, SMPS design and architectures, new battery technologies.

More 300mm wafer fabs as foundries slow down and EDA market grows

The worldwide number of operational 300mm wafer fabs is expected to climb to 121 this year and grow to a total of 138 fabs in 2023, according to a report recently released by IC Insights. As of today, however, this growing manufacturing capacity is being confronted by a slowing foundry business, as TrendForce points out in its newest research report. Foundries face a severe challenge in 1Q19, with global production revenue expected to decline by around 16% compared to the same quarter 2018, arriving at 14.6 billion USD. TSMC, Samsung and GlobalFoundries take first, second and third place respectively in market shares. According to TrendForce, although TSMC’s market share reaches 48.1%, the foundry suffers a near 18% decline in year-on-year growth.

EDA, instead, will continue to grow at a significant pace: a recent report from values the global electronic design automation tools market at USD 9.76 billion in 2018 and predicts this figure to reach USD 17.35 billion by 2024 – with a forecasted CAGR of 10.1% during the period of 2019-2024.

Read the rest of Major stories this week: market reports, Synopsys, SMPSs, AI acceleration, batteries

Major stories this week: Interconnect fabric, RISC-V ecosystem, ARM Neoverse, USB4

March 15th, 2019 by Roberto Frazzoli

Three recent and unrelated events confirm the ever-growing importance of the technologies and architectures used to connect processing elements at all levels – within a chip, among chips, within a datacenter. Other significant announcements made over the past few days concern the growing RISC-V ecosystem; the first Arm Neoverse system development platform on TSMC 7nm process technology; and EDA/T&M vendors getting ready for USB4.

Bit Traffic

On March 11, the GPU vendor Nvidia announced the acquisition of Mellanox, a key player in high-performance interconnect technologies. With this acquisition, Nvidia aims at optimizing datacenter-scale workloads across the entire computing, networking and storage stack to achieve higher performance, greater utilization and lower operating cost. According to Nvidia, datacenters in the future will be architected as giant compute engines with tens of thousands of compute nodes, designed holistically with their interconnects for optimal performance. Hence the strategic importance of joining forces with Mellanox.

Read the rest of Major stories this week: Interconnect fabric, RISC-V ecosystem, ARM Neoverse, USB4

EDACafe Industry Predictions for 2019 – Silvaco

January 16th, 2019 by Babak Taheri

Semiconductor Technology: We have seen a dramatic rise in the use of new kinds of semiconductor devices for mobile phones, automobiles, Intelligent Edge nodes, smart sensors, big data compute and storage utilizing artificial intelligence, machine Learning, and neuromorphic computing.  Both Magneto-Resistive memory (MRAM) and Resistive RAM (ReRAM) technologies will play key roles as well as many optical and chemical sensors. TCAD solutions developers will partner with both memory and sensor technology companies in 2019 to accelerate their technology’s development and adoption in several markets.

Atomistic CAD:  We will see the adoption of atomistic TCAD to extend Moore’s law to model and simulate devices such as Nanowires and Nanosheets including sensors and quantum dots that approach a few nm in size. Collaborations with university researchers such as Purdue, and their NEMO suit of tools, will enable successful development of nanoelectronic and nanosensor solutions.

Read the rest of EDACafe Industry Predictions for 2019 – Silvaco

EDACafe Industry Predictions for 2019 – ESD Alliance

January 15th, 2019 by Bob Smith, Executive Director

Shifting supply chain dynamics as the design ecosystem moves away from years of a chip-centric focus to a broader system design perspective will bring new players in 2019. This will forge event stronger links between design and manufacturing that began in earnest in 2018. Global industry associations such as the ESD Alliance and SEMI will serve as conduits, creating opportunities for members to connect, partner and innovate through networking and industry events, the newest being ES Design West in 2019. To be co-located during SEMICON West 2019, ES Design West will be the only event in North America dedicated to the Design and Design Automation Ecosystem™ further uniting the electronic systems design community to the electronics supply chain.

EDACafe Industry Predictions for 2019 – OneSpin

January 14th, 2019 by Sergio Marchese

OneSpin sees two trends dominating the semiconductor and EDA industry for 2019. The first is that security and trust will start becoming key requirements for many applications. Prevention of hardware vulnerabilities and protection from attacks are essential to ensure safety, data privacy and availability of essential infrastructure. Today, this field is dominated by software, but it has become clear that hardware must play a bigger role in addressing this challenge. Similar to safety, where standards such as ISO 26262 and hardware safety mechanisms protect systems against systematic and random failures, we will see the emergence of security standards. They will prescribe strict hardware development processes in order to avoid vulnerabilities and hardware security mechanisms that protect electronic systems from adversary attacks.

The problem of trust in the IC supply chain is also closely related with security and will become more prominent. How do you ensure that third-party or even internal IP do not include kill switches, backdoors, or other types of hardware Trojans? Dealing with unintended vulnerabilities is hard enough. Malicious vulnerabilities are even tougher to address because most verification and validation solutions we have now are not fit for this purpose. While the problem of trust is not yet on the radar of most organizations, in 2019, we will see a sharp growth in awareness of these type of issues.

Read the rest of EDACafe Industry Predictions for 2019 – OneSpin

EDACafe Industry Predictions for 2019 – Esperanto

January 11th, 2019 by Mike Buchanan

2018 saw an explosion of innovation in the chip industry – a level of excitement and innovation last seen during the mid-90s RISC processor revolution – driven by huge market disruptions in artificial intelligence (AI) and the advent of open standard Instruction Set Architectures (ISAs) such as RISC-V. These disruptions spurred an avalanche of funding, with hundreds of millions of dollars in new chip-related VC investments, to serve the projected $50+ billion AI chip market.

In 2019, we predict that ever more innovative AI applications will emerge, and that AI processing will move from first-generation solutions such as CPUs and GPUs to domain-optimized AI accelerator chips designed specifically for machine-learning algorithms. They will feature higher performance, reduced cost, and  superior energy efficiency of typically ten times better than GPUs and 100 times better than CPUs. They will be scalable, and cover a much wider range of cost and power points.
Read the rest of EDACafe Industry Predictions for 2019 – Esperanto

EDACafe Industry Predictions for 2019 – GreenWaves Technologies

January 10th, 2019 by Martin Croome

In past years, specialized processors have existed in very large vertical markets such as mobile phone application processors or markets where specific technical constraints exist such as DSPs. But broadly, processors have been segmented on compute capability: general purpose processors for servers vs. PCs vs. low-compute embedded applications. Specialization in processors has been constrained by Moore’s Law for many years, in many cases by invalidating the business case and matching the extra performance of the specialized processor just through Moore’s law effects.

Pure Moore’s law improvement, cutting costs in half while doubling the number of transistors, has increased from a year to 18 months. With the increasing limitations of Moore’s law, semiconductor companies will continue to extend further as the cost of implementing new processes and producing designs for them has skyrocketed.

Read the rest of EDACafe Industry Predictions for 2019 – GreenWaves Technologies

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