What Would Joe Do?

Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

Strange bedfellows: Synopsys & Software Freedom Conservancy

 
September 9th, 2014 by Peggy Aycinena

 

Open source EDA software has been of interest to many, albeit not all, for a number of years. The appeal is intuitive: price point, ability to modify code, ability to weigh in on the design and usability, and so on. The drawbacks are also intuitive: unstable code, insufficient and/or eccentric documentation, ebb and flow of volunteer developers, lack of long-term support for algorithms and code, inability to interact with customers at a detailed enough level to provide software that truly solves problems and supports design.

There are two other drawbacks as well. Open source software is difficult to monetize around and it’s the antithesis of all things proprietary. The EDA industry, however, is profoundly proprietary. End of story?

Surprisingly, no. If you google “Synopsys Open Source”, you’ll get a whole page of links with this intro: “The following open source software are included in one or more Synopsys FPGA software products. Each is a link to information and source code for the respective package. In addition, when required by the open source license agreement, source code or information on acquiring source code is also included with the software product.”

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Fall Schedule: Let the games begin

 
August 28th, 2014 by Peggy Aycinena

 

With the advent of September, the fall conference season begins. Here are some upcoming meetings you may want to attend.

* DesignCon China – September 2-5 – Shenzhen
Last year close to 13,000 attended ICC-China. Expect even more to attend this year.

* Mentor Graphics Forum – September 3 & 5 – Shanghai & Beijing
Keynote will be given by Mentor CEO Dr. Wally Rhines, followed by President of ARM Greater China Allen Wu talking about the next 10 billion chips to be manufactured in China.

* IDF14: Intel Developers Forum – September 9-11 – San Francisco
Intel CEO Brain Krzanich will give opening keynote, followed by lots of talk about the IoT.

* PCB West 2014 – September 9-11 – Santa Clara
The most important conference of the year for board designers.

* Mentor U2U Automotive – September 10 – Dearborn
The debut of a new Mentor User2User event focusing on one of Mentor’s favorite core competencies.

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ShakeAlert vs. QuakeFinder: Predicting the Big One

 
August 25th, 2014 by Peggy Aycinena

 

Thirty two hours ago, the earth let loose here in Northern California delivering up a 6.0 earthquake 5 miles southwest of Napa in the heart of the wine country. It was the biggest earthquake we’ve experienced in the region since the 1989 Loma Prieta quake, which was a 6.9 on the Richter scale.

The thing about earthquakes is that they come on you suddenly, which is scarier than hell. Nonetheless, at a Sunday afternoon party yesterday in Silicon Valley, where the earthquake was felt even though the epicenter was 80 miles away, a Bay Area native said, “We may not know an earthquake’s coming, but I’d still rather live here than in places where they’ve got tornadoes. Now those are really scary!”

Ironically, on local radio this morning a geologist based in the Midwest was being interviewed about yesterday’s South Napa quake and concluded by saying, “You know, we may have tornadoes in our area, and they are pretty darn scary, but I’d far rather live here than where you guys are. At least we have warning when a tornado’s bearing down on us!”

But is that implication true? Is there no such thing as a warning prior to an earthquake? Well, for those of us who live in Earthquake Country, we are beginning to think [hope] differently.

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SIGDA PhD Forum: a Perspective on the Future

 
August 14th, 2014 by Peggy Aycinena

 

SIGDA is ACM’s Special Interest Group on Design Automation. They do lots of great stuff including organizing workshops and conferences, distributing and maintaining tool benchmarks, supporting the ACM Transactions on Design Automation, and perhaps most importantly, encouraging graduate students to pursue productive careers in EDA by way of the University Booth and PhD Forum at DAC.

This year’s SIGDA PhD Forum was held Tuesday evening, June 3rd, in San Francisco at DAC. Basically a large poster session, Room 104 in Moscone Center was packed from 7:00 pm to 8:30 pm with students, professors, and industry colleagues. It’s well-known that grad students come running whenever there’s free food, so given that a buffet dinner was part of the evening’s entertainment it’s not surprising there was a lively turnout for the event. However, grad students also love a good competition and the PhD Forum had that as well.

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Carpe Diem to Nanu Nanu: Keeping it all inside

 
August 12th, 2014 by Peggy Aycinena

 

Amidst this terrible summer of death in Sierra Leone, Guinea and Liberia, Ukraine, Gaza, Sudan, Syria and Iraq, how can we be so narcissistic as to mourn the death of an entertainer, a man who did nothing more than ham it up on stage and in front of the camera?

I’ll tell you how. It was Robin Williams. A man who was far more about the wistful, sun-and-fog-filled spirit of the Bay Area, than he ever was about the glitz and gluttony of Hollywood. A product of this region, a neighbor, and a most-beloved native son, he was our Robin Williams. Someone who reflected our eclectic tastes, our egalitarian nature, our breezy weather, our naughty frantic energy, and the boundless opportunities here to stretch one’s imaginations, talents, and zany innovations to the limit.

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EDA in Moscow: Business as Usual, the Glue that Binds

 
August 7th, 2014 by Peggy Aycinena

 

Ten years ago, numerous hardworking folks in EDAC struggled long and tenaciously to get EDA software removed from a host of restricted-overseas-commerce lists. For those efforts several members of the EDAC community were honored, while sighs of relief were breathed that the industry would not be foolishly restricted by the U.S. Government from exporting their agnostic-to-end-use software.

After all, why would electronic design software have anything to do with communications, avionics, surveillance, ground-based mechanized weaponry, or surface-to-air missile guidance systems, let alone a host of other electronic junk? ‘Just because we made it, doesn’t mean we want it to be used by the bad guys for evil purposes,’ the EDA industry said. And added, ‘Heck, we just produce the stuff. We’re not responsible for how it’s used.’

Of course, that’s not to say that restrictions and guidelines for international commerce have not applied to both EDA and IP. In September of last year, I attended an evening seminar hosted by EDAC that, thanks to the articulate intelligence of Cadence Group Director for Export Compliance and Government Relations Larry Disenhof, outlined in detail the complexities and convoluted guidelines that business folks in the United States must adhere to if they want to stay legal and in business when participating in overseas trade.

It all seemed highly confusing and fraught with the dangers of inadvertently operating outside the lines of what the U.S. Government considered appropriate behavior. Nonetheless, Disenhof offered hope that if companies paid close, close attention to the shifting sands of international relations – pretty much on a daily basis – they would be okay when it comes to obeying the law.

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Invionics: Optimism leads to Innovation

 
July 29th, 2014 by Peggy Aycinena

 

There are two ways you could have talked to the young Vancouver-based company Invionics in June. Make your way to British Columbia, or seek them out in the Verific booth at DAC in San Francisco. The second option is how I got to chat with Invionics CEO Brad Quinton, and although our conversation amidst the organized chaos of DAC was brief, it left the impression of a company with a bold future ahead.

Per their website, the company’s products include “design tools, hardware IP and EDA development platforms.” However, Invionics also provides “experienced contract R&D to extend our products and IP, [which enables our] customers to quickly implement key functionality and gain competitive advantage for their products.”

In other words, Invionics is my favorite kind of company: A product company that’s also a services company. Of course, this is my evaluation and not necessarily theirs. Nonetheless, it was completely refreshing to talk to somebody at DAC who seems to look at things with a new perspective, an optimistic perspective that’s all about charting a new path going forward.

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Rhines: EDAC’s Numbers as The World Turns

 
July 17th, 2014 by Peggy Aycinena

 

Once again EDAC’s Market Statistics Service has released quarterly results for the EDA and IP industries, and once again Mentor Graphics CEO Wally Rhines has taken time to debrief the press on the numbers. When we spoke by phone on July 15th, Rhines started with a qualitative eval of the financial situation in Q1_2014, and moved from there to answer several longer-range questions about autos and today’s troubled world.

“The first quarter of 2014 was good for the industry, but not great,” he said. “With overall growth of 4.6 percent, year over year, it was a good quarter with the highlight being logic design was up a solid 6.6 percent. Other than that, there was not a lot else [remarkable in EDA].”

“Steady, but not glamorous, for Q1?” I asked.

Rhines said, “Yes, steady as she goes in EDA. The IP business, however, was up strongly in Q1, driven up by results from the non-reporting companies, not members of EDAC. We collect public info from non-reporting IP companies such as ARM, Imagination Technologies, MIPS, Rambus [and Synopsys], and we can see overall that the IP business [exhibited] 10-percent growth, quarter over quarter, Q1_2013 to Q1_2014.”

He added, “The bigger trend [visible in] the current MSS report is that all of the world is showing strong [sales], except Japan which is very weak, down 19 percent in contrast to Asia Pacific, which is up 13.5 percent.

“You should also note that North America and Europe are quite strong, up 7 percent or more.  Japan is well below those regions as well. Japan used to be a big part of the total [numbers for the industry], substantially larger than the Asia Pacific Region, but now the Pac Rim is twice the size of the Japanese market.”

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Silicon Cloud: Architecting the Future of Design

 
July 16th, 2014 by Peggy Aycinena

 

Despite its ethereal-sounding name, Silicon Cloud International is a company grounded in the reality of chip design, particularly for an important international demographic, professors and students. Mojy Chian is CEO of the Singapore-based SCI. We spoke recently by phone.

Chian started by defining the cloud. “The concept of the cloud is straightforward. It means remote computing, so if you are not using your local machine, you are using the cloud. There are a lot of applications in the cloud, including eCommerce, Facebook, cloud storage, and remote collaboration based in the cloud.

“Certainly, usage of the cloud has taken off in recent years, but remember there are several different types of clouds. In contrast to private cloud computing, public cloud computing means accessing machines [owned by other companies such as Amazon], where you can actually go and use their machines.”

Our conversation being specific to chip design, I asked Chian to comment on widespread industry concerns regarding security when working in the public cloud. Companies are oft-times reluctant to compute and/or store their designs in the public cloud for fear of losing their precious data to hackers and pirates.

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DAC 2014: Advanced nodes and going back in time for a solution

 
June 12th, 2014 by Peggy Aycinena

 

In response to my blog this week about the June 5th panel at DAC, “Advanced Node Re-spins: Be Very afraid (maybe)“, Bill Martin, President/VP of Engineering at E-System Design, sent the following comments.

******************

For 15 years, I was on the same process-node-jumping bandwagon. Always looking for that next node to help solve cost, performance, area and speed that might help with the overall schedule. Even in these older (larger) processes, each new process required 2x the resources (people, time, machines, etc.) to achieve tape out.

Fortunately, I was happily ‘stuck’ using VLSI Technology’s foundries, processing and wafers. Although we were not perfect, we did learn quickly to hone processes, models, design flows, etc., to minimize rework. But that world I knew was prior to the ASIC dis-aggregation that has taken place over the past 2 decades, and because there are pros and cons to that dis-aggregation, your summary of Thursday afternoon’s DAC panel brought back some pleasant memories, as well as nightmares. Clearly we need a new mindset!

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