April 9th, 2015
In a recent blog, Does Your Synthesis Code Play Well With Others?, I explored some of the requirements for verifying the quality of the RTL code generated by high-level synthesis (HLS) tools. At a minimum, a state-of-the-art lint tool should be used to ensure that there are no issues with the generated code. Results can be achieved in minutes, if not seconds for generated blocks.
What else can be done to ensure the quality of the generated RTL code? For functional verification, an autoformal tools, like Real Intent’s Ascent IIV product can be used to ensure that basic operation is correct. The IIV tools will automatically generate sequences and detect whether incorrect or undesirable behavior can occur. Here is a quick list of what IIV can catch in the generated code:
- FSM deadlocks and unreachable states
- Bus contention and floating busses
- Full- and Parallel-case pragma violations
- Array bounds
- Constant RTL expressions, nets & state vector bits
- Dead code
Designers are are also concerned about the resettability of their designs and if they power-up into a known good state.
The Ever-Changing Semiconductor Landscape
April 8, 2015 by Tom Anderson, VP of Marketing
By some measures, the EDA market is a dynamic one. Many of our technological advances have come from startups and small companies, a list that gets refreshed as new market needs arise and as former independents get acquired or merge. The technology changes constantly to meet the needs of the semiconductor suppliers and system houses that are our customers. However, when it comes to market leadership EDA is incredibly static. The same three big companies have been at the top for more than 20 years now, we believe ever since Cadence swallowed Valid in 1991 and Synopsys moved into the third spot. Of course there has been some shuffling among Cadence, Synopsys, and Mentor, but that has happened only a few times.
This is in sharp contrast to the semiconductor business. Although Intel and Samsung have been at the top for more than ten years, several different companies have been number three and four during this period, with many shuffles along the way. There has been constant churn below the top slots, with several dramatic success stories for new vendors emerging during this same period. Since semiconductor companies are a main source of sales for EDA, we pay a lot of attention to the market and how it evolves. In this post we show one noteworthy market assessment and discuss some of the reasons for the changes and some of the implications for the industry as a whole.
Frank Schirrmeister, Group Director of Product Marketing for the System and Software Realization Group at Cadence, had just returned from DATE in Grenoble when we spoke several weeks ago about the philosophy and technology behind Cadence’s emulation business unit. First, however, we spoke about Grenoble.
I asked Frank if DATE had been a success this year and he said, “Absolutely, yes. It was very interesting as it has transformed from a generic show into more of a technical conference. So the focus now is on the sessions.
“Particularly interesting for me, I was chair for a session about tools for the IoT. Jan Rabaay from U.C. Berkeley, always a good speaker, gave a great presentation on wearable trends. NXP also participated, talking about the connected car, and ARM spoke about their embed OS for the edge nodes. Also among those topics, we talked about debug. It was all very good.”
Having enjoyed DATE many times myself, I asked Frank what he thought distinguished the conference from DAC. He said, “First of all, DATE was in Grenoble, which is always a great destination. Then, of course, at DATE you see the European point for view.
“For instance, I had a presentation for my session regarding automotive issues, and included material of interest to our customers in Japan and Europe. The share of semiconductors in cars from those markets focuses more on the mission-critical pieces in the design. The focus is different for automotive customers in North America, where it centers more on mobile connectivity within the vehicle.”
All of this being very interesting, I turned the conversation to the real reason for our phone call: To allow Frank to clarify emulation at Cadence.
This is the second part of a series of blogs about hardware coherency. In the first blog I introduced the fundamentals of cache coherency: Extended System Coherency – Part 1 – Cache Coherency Fundamentals
This part talks about the implementation of hardware cache coherency and use cases.
Implementing Hardware Coherency
ARM’s first implementations of AMBA® 4 ACE include the ARM® CoreLink™ CCI-400 Cache Coherent Interconnect, ARM Cortex®-A15 and Cortex-A7 processors. These products were first released to our silicon partners in 2011, and we’ve seen the first big.LITTLE™ products come to market in 2013.
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