October 23rd, 2017
I need to get a few things off my chest but first, let me state the obvious. I have made so many terrific relationships in my nearly 20 years as a recruiter, focused solely on EDA/Semi. During that time, I have worked with hundreds of companies, talking to and helping so many C-level executives find the right new person that will help take their company forward, and have placed more people in our EDA world than I could possibly count. Recently things have changed and by calling attention to it, I hope more companies will consider the following when engaging a recruiter and interviewing candidates.
Let me start by making one point perfectly clear; I am on the company side when it comes to the actual hiring. Every company has and deserves the right to hire the candidate with the proper qualifications and cultural fit, and I always strive to help them do exactly that. If the candidate is deemed to be “not the right fit”, they should understandably not make an offer and let everyone know. What I am talking about in this article is more than that …I am NOT talking about the right of the company to pick the right candidate, the best candidate; I am talking about the methodology for interviewing and the respect for that process.
Teklatech: Work smart, Not hard
October 19, 2017 by Peggy Aycinena
Copenhagen-based Teklatech is such an interesting example of an EDA company: similar in many ways to other organizations in the ecosystem, but highly unusual as it is based in Denmark. When Founder & CEO Tobias Bjerregaard and I spoke by phone this month, he began with the motivation for his company’s technology.
The discussion then moved to the business challenges within EDA, a topic that Bjerregaard said he always enjoys discussing. As he feels that Teklatech is providing critical solutions for today’s semiconductor designs, it’s not surprising that his enthusiasm here is palpable, for the industry and the trends that drive it.
The Electronic System Design Alliance began life as the EDA Consortium over 25 years ago. Early last year, EDAC morphed into the ESD Alliance thanks to the efforts of many, not the least being ESD Alliance Executive Director Bob Smith, now in his third year serving in that role.
As currently I am mid-way through the process of speaking to the leadership of all of the member companies in the ESD Alliance, it was good to talk recently with Smith and discuss his vision for the future of the organization. His enthusiasm mirrors that of the many companies I have spoken with so far.
For a long time I have been a fan of code coverage tools that are embedded into the simulators themselves, and which give you the ability to switch easily between the code and the coverage results. It is particularly helpful to have a way of navigating the hierarchy, selecting a coverage result and then being able to look into the source code and make changes.
I recently had occasion to explain to someone how the feature works in Aldec’s Riviera-PRO, and to reflect on the tool developments that led to this great capability. As you may be aware, Aldec has a number of legacy coverage tools that allow you to view the coverage results from within the simulator; and which give you easy access to the coverage results and the corresponding lines of code. With the introduction of our unified coverage database – in .acdb format – it became possible to see the code coverage results in a more flexible format. The biggest boost, in my opinion, was the introduction of a cross-probing capability.
For those of you who are wondering how to use this feature.
- Open Riviera-PRO 2016.06 or newer and run your design with Coverage Enabled.
- Open the datasets window (View-> Hierarchy and Objects-> Datasets).
- Right-click in the window and select Add.
- Add the .acdb file associated with your design (it should show up as Simulation n, where n is number).
- Click on the newly added database.
For the rest of this article, visit the Aldec Design and Verification Blog.
Creativity and innovation, which lead the society to success, rest on the foundational institutions such as schools and universities. They provide fertile soil to seed, grow and flourish enterprises. To harvest more within an industry, the ecosystem needs to be enriched where the seeds are grown. Considering that the university’s courses are the nutrition to student, they need to be designed in a productive manner as they will provide the next generation of engineers. By providing the necessary platform in addition to the rich and informative tutorials, the quality of the input information for students would be assured. Particularly in the field of Electrical and Computer Engineering, it is important that students get as much hands on experience as possible, and tackle design challenges – such as HW/SW co-design and co-verification – before entering the job market; for their own benefit as well as the industry as a whole.
In this blog, you will become familiar with the TySOM Education kit (TySOM EDU) package designed for the university courses related to hardware design and embedded system design researches.
The TySOM EDU contains a TySOM embedded development board, Riviera-PRO advanced hardware simulator and informative tutorials and reference designs. Although it is possible to choose any development board from the TySOM embedded development board family, the TySOM-1A-7Z010 would be the most cost-effective solution for most university projects.
TySOM-1A-7Z010 (ZynqTM) is a ready-to-use and feature-rich embedded development board which provides the required peripherals to tackle both basic and advanced Zynq-based projects. The XC7Z010 is based on the Xilinx® All Programmable System-on-Chip (SoC) architecture, which integrates a dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. Coupling the device to a rich set of peripherals for connectivity, communication and multimedia, makes this board ideal for university projects requiring HW/SW co-design. For the rest of this article, visit the Aldec Design and Verification Blog.
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