April 26th, 2017
Please join me in welcoming two new members of the ESD Alliance –– CAST and SoC Solutions –– both of whom are semiconductor IP providers and intend to become active members of our SIP Working Group.
CAST of Woodcliff Lake, N.J., has 23 years of SIP experience and offers a range of production-proven SIP cores that include controllers and processors, compression, peripherals, interconnect and security, and encryption.
SoC Solutions from Suwanee, Ga., enables next-generation IoT and Machine to Machine (M2M) silicon devices by supplying processor-based IP and services to build innovative, low-power “connected” products.
According to Jim Bruister, SoC Solutions’ CEO: “The ESD Alliance is the all-important connection to the semiconductor design ecosystem. For a company like ours, there’s no better organization to belong to for both the networking opportunities and the Semiconductor IP Working Group that’s helping to define so many critical aspects of our market segment.”
“The IP market segment surpassed the historically larger CAE segment of EDA and needs focused, committed attention to a variety of business and technical requirements,” concurs Nikos Zervas, CEO of CAST. “The SIP Working Group offers a forum for companies to identify new growth areas and advance the most effective means to deliver our technology.”
Jim and Nikos are right. The SIP Working Group headed by Warren Savage, Silvaco’s general manager of IP, is creating a common methodology and best practices for fingerprinting, and an end-to-end solution for tracking and auditing soft and hard IP.
We’re delighted companies like CAST and SoC Solutions that also provide design services recognize the ESD Alliance as their voice to the semiconductor design ecosystem. As Jim Bruister pointed out, SoC Solutions values the Alliance’s range of networking opportunities, as does CAST. Both agree that the networking opportunities are another great reason for joining.
Has your company considered joining the ESD Alliance? Our roster of member companies is growing, especially in the IP market sector, an increasingly important area of the semiconductor industry. If your company would like to join or learn more about the membership options, please visit the ESD Alliance website to read more about the SIP Working Group, our other committees and ongoing initiatives. I’m available to answer questions as well and can be contacted at firstname.lastname@example.org
If you aren’t already, please follow the ESD Alliance at:
ESD Alliance Bridging the Frontier blog: http://bit.ly/2oJUVzl
#54DAC 7: IoT: Tales from the Frontline.
April 21, 2017 by Michael (Mac) McNamara, Gen Chair 54th DAC; Pres & CEO Adapt-IP
We hear from media outlets that Internet of Things (IoT) solutions will be soon be surrounding us in our homes, our offices, our schools; in factories and farms; working to make our life better, or perhaps working to eliminate our species! Well, 50+ years has taught us that any new technology happens first at DAC, and adding credence to the media’s predictions, you will see IoT technology information and insights everywhere the 54th Design Automation Conference.
There is not some new job title of “IoT engineer.” Instead our familiar, experienced analog, mixed-signal engineers, RF engineers, server architects and mobile developers and verification teams are applying our tools and their skills in this new application area. Since IoT design elements touch most EDA engineering disciplines, we’ve made it easier for DAC attendees to learn what they need to know about IoT trends and technology wherever they are at the Austin Convention Center.
Here’s a sampling of IoT-related presentations that can be found in keynotes, SKY Talks, fireside chats, DAC Pavilion sessions and tutorials:
Keynotes, panels and more
This year we’re offering attendees a front-row seat to the front lines of IoT innovation. For starters, check out legendary EDA executive Joe Costello’s event-opening keynote. Costello, now CEO of Enlighted, a Silicon Valley IoT startup, will discuss how we are giving buildings “consciousness” and what that means for companies, employees and society. (Monday, 9:15 a.m.)
Another must-see IoT keynote is on Wednesday when Tyson Tuttle, CEO of Silicon Labs, will consider the market imperatives and engineering challenges of adding connectivity to electronic devices, including cost, ease of use, energy efficiency, interoperability, future extensibility and security.
Rounding out an impressive lineup of IoT-themed keynotes this year will be Rosalind Picard, founder and director of the Affective Computing Research Group at the MIT Media Laboratory (Thursday 9:10 a.m.). She’ll describe how we’re designing in emotional intelligence into devices more in the future and what that means not only for design and device functionality but the broader societal implications.
The elephant in the IoT room these days is security–specifically who’s responsible for security when and how. If this is a burning issue for you, you won’t want to miss our panel Tuesday at 3:30 p.m. Representatives from Trustonic, the Technische University of Berlin and Tozny LLC will discuss the real-world impact of available security hardware, the related shortcomings as well as new research and development directions in hardware-assisted security and privacy solutions.
A new feature this year at DAC is the FPGA IoT Design Contest, sponsored by ACM SIGDA and Lattice Semiconductor, which is underway now. Five final design contestants will be highlighted at DAC in the World of IoT exhibit, and the top three design winners will be announced at the conference in the DAC Pavilion Wednesday June 22 at 3 p.m.
But wait, there’s more! You can find many additional IoT learning opportunities on the DAC website in a couple of ways. First, navigate to the DAC Program landing page and filter your search on the left-hand navigation bar with IoT under Tracks. A second way is to head to our IoT landing page and browse the choices there. Advance Registration for DAC is available now till May 30, which gives you a 25% savings on a full conference badge.
And remember: DAC provides free parking at the Austin Convention Center and all DAC badges include complementary evening social receptions!
See you at DAC – Register at: https://dac.com/content/registration.
There’s two kinds of conversations when it comes to electrical systems and cars. One is about the power train and the other one is about the advanced driver-assistance system, ADAS. Distinct as they may be, both of these systems can benefit from the optimizations associated with design automation, and both of these systems today are mashed up against the complexities of using third-party IP.
Chips in cars today need to manage the power train, or they need to provide safety and security for the driver – but either way, they need to work perfectly every time, all the time, and in some pretty hellish conditions. It’s hot under the hood and the road today is unforgiving. So are the lawyers.
So what’s a third-party IP provider supposed to do? Turn tail and run? Never sell into the automotive market where litigation looms larger than a sandstorm in April on the Texas Panhandle? Or try to man-up and work with the automotive market to provide IP that fits well into the chips that such customers need?
The White House this week issued an Executive Order launching a complete review of the H-1B visa program as it pertains to high-tech workers. Is this a relief for those involved in using these devices to bring in tech talent from overseas and want to get it right? Or does it harbor a deepening of what Synopsys Aart de Geus terms “a tragedy” – the ongoing difficulty of getting easy access to the global talent pool that Silicon Valley professes to need?
More fundamentally, why are there H-1B visas in the first place? Are there indeed too few American nationals with the training needed to push Silicon Valley’s tech agenda forward? And if those numbers are insufficient, why can’t the talent pool be augmented with off-shore workers laboring away in distant climes?
After all, distributed teams and remote computing have been a way-of-life for several decades here in the Digital Age. Remember all of the crowing at the dawn of the Era of the Distributed Team: Development would go on non-stop, 24×7. Wherever the sun is shining, designers are designing, was the received wisdom when it comes to global teams – and it continues to be.
So, why is it so important to bring people into the U.S. when they can work elsewhere, in their own locale – their efforts melded into the corporate whole via VPNs and/or crafty IT interventions that knit the project together seamlessly. All of that enhanced even further with the advent of The Cloud that Computes.
The semiconductor design ecosystem came out in force Thursday, April 6, for the CEO Outlook at Synopsys in Mountain View, Calif. It was a great crowd and an exceptional panel moderated by Semiconductor Engineering’s Ed Sperling. Thanks to Lip-Bu Tan of Cadence, Wally Rhines from Mentor, ARM’s Simon Segars and Aart de Geus at Synopsys for their insights and a lively discussion.
Our special guests that night were from the Dwight D. Eisenhower School for National Security and Resource Strategy, part of the National Defense University (NDU). The ESD Alliance hosts a yearly visit from the NDU students and organizes meetings with noted semiconductor companies in Silicon Valley to help educate them about our industry and its importance to the global electronics industry.
A picture is worth a thousand words, so I’ll dispense with a long blog and let the photos tell the story.
If you’re craving words to describe the evening, Peggy Aycinena wrote a blog filled with color and loads of details on EDACafe. It can be found at: http://bit.ly/2kjVajD
From left to right: ESD Alliance Board Chair Grant Pierce of Sonics, the ESD Alliance’s Julie Rogers, Wally Rhines, Aart de Geus, Paul Cohen of the ESD Alliance and Larry Disenhof of Cadence.
Ed Sperling of Semiconductor Engineering (at left) with panel members and ESD Alliance Board Member (from left to right) Lip-Bu Tan of Cadence, Wally Rhines from Mentor Graphics, ARM’s Simon Segars and Aart de Geus of Synopsys.
From left to right: Raul Campasano of Sage Design Automation, an ESD Alliance member company, Ed Chang, retired, and Steve Pollock from AiPac.
From left to right: Sherry Hess of and Ted Miracco of SmartFlow, both ESD Alliance member companies, and John Ennis of Cadence.
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