April 24th, 2014
Talking to ProPlus Design Solutions requires a long view of history over at least the last 20 years in EDA. In 1993, BTA, an EDA company focused on device model extraction and SPICE simulation, was founded with U.C. Berkeley’s Dr. Chenming Hu as Chairman of the Board. In 1999, BTA merged with Ultima, and became Celestry in 2001.
Finally, in 2003, the combined companies were acquired by Cadence Design Systems. Then in 2007, a new company called ProPlus was spun out of Cadence to support the original BSIMProPlus device modeling platform with roots going back to BTA/Celestry.
Current ProPlus CTO Bruce McGaughy earned his PhD at Cal with Chenming Hu as his advisor, served at both BTA and Celestry, and worked at Cadence, before joining ProPlus 6 years ago. I had a chance to talk with Dr. McGaughy in person last month in Silicon Valley. Our conversation covered a range of topics.
This week, Cadence announced its intention to acquire Jasper Design Automation. The news precipitated a tsunami of commentary, some of which is included in this blog: Atrenta’s Piyush Sancheti deems the move to be a good one; Cadence’s Craig Cochran and Michal Siwinski second the motion; and Elmer, whose clairvoyance regarding a Jasper acquisition was criticized by Oz Levia last fall, asks if the Cadence move is more a matter of window dressing. Finally, I offer a brief prediction regarding one possible long-term effect of this M&A.
Complexity Drives Smart Reporting in RTL Verification
April 24, 2014 by Lisa Piper, Senior Technical Marketing Manager at Real Intent
This article was originally published on TechDesignForums and is reproduced here by permission.
It’s an increasingly complex world in which we live and that seems to be doubly true of state-machine design.
With protocols such as USB3, PCI Express and a growing number of cache coherent multiprocessor on-chip buses and networks, the designer has been greeted with a state-space explosion. USB3 has, for example, added an entire link layer and, with it, the Link Training and Status State Machine. This is, in itself, a complex entity, which although it has only 12 states in total can move between them using a variety of different arcs.
April 21, 2014: A-Day for Formal Analysis
April 22, 2014 by Tom Anderson, VP of Marketing
Yesterday may well go down in EDA history as one of the most important days in the evolution of the market for formal analysis. If you had asked me why yesterday morning, I would have said it was because I was attending the third “Decoding Formal Club” meeting sponsored by formal consulting experts Oski Technology. The range of companies represented there, and the enthusiasm for the topic, was a clear indication that formal has become an A-list technology for many verification teams.
So I planned to write today’s post about this meeting. But then, just as it was ending and Oski was thanking all the participants, news broke that Cadence had acquired formal leader Jasper Design Automation for $170M. Of course, this news was of intense interest to the attendees. It made yesterday “Acquisition Day” for formal analysis, so I’ll dub it “A-Day” and provide some thoughts in this post. I will talk a bit about the meeting as well, but will go into more details about the material presented in a future post.
In the moments prior to Cadence’s quarterly earnings call this afternoon, the company released news of the acquisition of Jasper Design Automation for $170 million, less $24 million in cash, and a small tremor rippled out across the EDA Nation.
Paraphrasing Cadence CEO Lip-Bu Tan in the early minutes of his 5pm ET earnings call: We are very pleased to announce a definitive agreement to acquire Jasper Design Automation. This will help us to further meet our customers’ needs for more advanced verification solutions, particularly today as verification now represents 70% of the cost of SoC development. Together, Cadence and Jasper can move forward, offering the strong formal verification solutions leading customers need. In addition, Cadence is also very pleased to be bringing on board the strong team at Jasper, a team with excellent real-world experience.
All good stuff, yes? So why any tremors in our beloved little EDA Nation?
Article source: Intel Free Press
Indira Negi brings passion for running, biometric experience and maker skills to development of Intel smart earbuds.
When she literally jogged on-stage to join Intel CEO Brian Krzanich in his opening keynote at International CES in Las Vegas, engineer Indira Negi was there to demonstrate the Intel smart earbuds that she and her team had developed, but the “smart” design she showed off also helped solve an issue the avid runner had personally encountered.
“I am a runner — I get hives from the sun, I have to run with gloves on,” said Negi about running with a smartphone. “That means when there is a bad song, I have to take out my phone, take off my gloves, unlock my phone and change the song.”
Starting from solving a problem that she knew all too well, Negi, a sensors systems engineer in the Intel New Devices Group, and a team set out to create a device and software that would monitor heart rate and adjust music playback based on sensor feedback. The result was the Intel smart earbuds reference design, developed in collaboration with Valencell.
Negi’s study of bioelectronics and biosensors in graduate school — she earned a master’s degree in electrical engineering from Arizona State — lent her a keen appreciation of the value of biometric monitoring.
One project she worked on while at ASU measured stress levels in saliva using specially treated paper. When you are working out, you are stressing your body in a positive way, explained Negi. If you work out too hard, this becomes negative stress, which can increase the chances of getting injured. She also worked on molecular imprinted polymers while at ASU coated with biochemical sensors that reacted only to specific molecules.
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