EDACafe Weekly Review February 25th, 2017

Photos from the Phil Kaufman Award Ceremony and Dinner, A Night to Remember
February 24, 2017  by Bob Smith, Executive Director

The Super Bowl wasn’t the only festive event over the last few weeks! The Electronic Systems Design ecosystem honored Andrzej Strojwas as the 2016 Phil Kaufman Award recipient during an awards ceremony and dinner attended by close to 200 of us from the industry. It was held Thursday, January 26, at the Fourth Street Summit Center in San Jose, Calif.

Caption: Kaufman Award recipient Andrzej Strojwas (standing in the middle with his statuette), along with his extended family, PDF Solutions and Carnegie Mellon colleagues and graduate students.

For those of you who don’t know Dr. Strojwas, he is PDF Solutions’ chief technologist as well as the Keithley professor of Electrical and Computer Engineering at Carnegie Mellon University. He was recognized with the award for his pioneering research in the area of DFM in the semiconductor industry.

The Kaufman Award is presented annually by the ESD Alliance and the IEEE Council on Electronic Design Automation (CEDA). For more information, check out: http://bit.ly/2l95wTO

As I did with the RISC-V event, I won’t try to recapture the evening when two of our favorite chroniclers Peggy Aycinena and Paul McLellan covered the evening so masterfully and neatly depicted the mood. (See the links to their blog posts below.) Instead, I’ll offer you a look at who was there through photos taken by the Alliance’s Paul Cohen and Julie Rogers and ace photographer Ross Mehan of Ross Mehan Photography. The video, produced by Andrew Mellows Video, will be available on the ESD Alliance website shortly.

Perhaps you’ll join us for the next Phil Kaufman Award dinner and ceremony. An ESD Alliance corporate membership includes two tickets to the dinner.

EDACafe: Kaufman Award Dinner: The Equality of Kindness By Peggy Aycinena

http://bit.ly/2loqlYH

Cadence’s Breakfast Bytes: Andrzej Strojwas Receives the 2016 Kaufman Award By Paul McLellan

http://bit.ly/2kjXHqI

Caption: Andrzej (second from right) along with (from left to right) wife Helena Strojwas, Tomek Brozek and Ela Brozek of ESD Alliance Member Company PDF Solutions and granddaughter Emilia Wilkinson.

Caption: Trio entertained attendees during the reception. From left to right: Daniel Gersz on Bass, Daniel Williams on Drums and Guitarist Rick Silvestri.

Caption: Simon Davidmann of Imperas (left) and Grant Pierce of Sonics and Chairman of the Board of the ESD Alliance.

Caption: Deidre Hanford of Synopsys and the ESD Alliance Executive Director Bob Smith.

Caption: (from left to right) Nisath Verghese of ESD Alliance Member Company Synopsys, Sani Nassif from Radyalis and Bill Joyner, retired.

Caption: Larry Pileggi from Carnegie Mellon University (left) and Aart de Geus of Synopsys, a Member of the ESD Alliance Board and the 2008 Kaufman Award recipient.

Caption: (from left to right): Manoj Gandhi and Rohit Vora of Synopsys, Vic Kulkarni from ESD Alliance Member Ansys and Dipesh Patel of ESD Alliance Member ARM.

Caption: (from left to right) Imperas’ Larry Lapides, Andrea Casotto and Jim Cantele of ESD Alliance Member Runtime Design Automation and ESD Alliance Member Company Mentor Graphics’ Shakeel Jeeawoody.

 

 

 

 

 

 

 

 

 

 

 

 

Caption: Bill Joyner (left) and Rob Rutenbar from the University of Illinois at Urbana-Champaign.

Caption: ESD Alliance Board Members Lip-Bu Tan of Cadence (left) and PDF Solutions’ John Kibarian.

Caption: (from left to right) Jennifir McGillis from IEEE CEDA, John Swan of Intel, Michelle Clancy of Cayenne Communication and ARM’s Brian Fuller.

Caption: (from left to right) John Barr of Needham & Company, Gus Richard at Auguste Research and Kimon Michaels from PDF Solutions.

Caption: (from left to right) James Spoto of Integra Devices, Antun Domic and Ted Miracco from SmartFlow Compliance Solutions, an ESD Alliance Member Company.

Caption: Antun Domic of Synopsys (at left) and Juan Rey from Mentor Graphics.

Caption (from left to right) Wally Rhines of Mentor Graphics, a Member of the ESD Alliance Board and the 2015 Kaufman Award recipient, Ed Cheng, retired, Aart de Geus and James Spoto.

Caption: (from left to right) The evening’s organizers Julie Rogers of the ESD Alliance, Jill Jacobs and Jennifir McGillis.

Caption: (from left to right) Sean O’Kane of Cadence and the evening’s emcee, MOD Marketing’s Jill Jacobs and Rick Carlson of ESD Alliance Member Company Verific.

Caption: The evening’s hosts Shishpal Rawat of IEEE CEDA (left) and Bob Smith.

Caption: Andrzej with Emilia and Helena.

Caption: (from left to right) Sean O’Kane, Warren Savage of ESD Alliance Member Company Silvaco and Chair of the ESD Alliance’s Semiconductor IP Working Group and Steve Pollock at AIPac Inc. and Chair of the ESD Alliance’s Emerging Companies Committee.

Caption: (left to right) Lip-Bu Tan, Andrzej Strojwas, 2016 Phil Kaufman Award recipient, John Kibarian and Shishpal Rawat.

Caption: (from left to right) Lucio Lanza of Lanza techVentures and a Member of the ESD Alliance Board of Directors and 2014 Kaufman Award recipient, Andrzej and Sandra Henneman.

Caption: Coby Zelnik of ESD Alliance Member Company Sage Design Automation (left) and Marcin Strojwas.

Portable Stimulus Takes Center Stage At DVCon 2017
February 23, 2017  by Maheen Hamid, co-founder at Breker Verification Systems, Inc

When DVCon opens next week, attendees will hear plenty of talk about Portable Stimulus, a methodology and technology that’s grabbing industry attention and gaining momentum with the design verification community. In fact, I predict it will be the buzz of the conference this year.

ESD Alliance Bulletin: DVCon, New Member Helic, Upcoming Events
February 23, 2017  by Bob Smith, Executive Director

I promised in my last post a special blog post with great photos highlighting the Phil Kaufman Award Ceremony and Dinner January 26. It will go up Monday.

But first, the news that the ESD Alliance will exhibit at DVCon at the DoubleTree Hotel in San Jose, Calif. We’ll be in Booth #100 in the foyer, so please stop by if you’re attending.

During DVCon, we’re co-hosting with OneSpin Solutions a panel, “Ride with the Verify Seven,” moderated by Jim Hogan of Vista Ventures featuring six verification leaders who grew their companies from startup to medium-sized industry player. It will be held Monday beginning at 7 p.m., after the Booth Crawl, until 8:30 p.m. Light refreshments and drinks will be served.

Panelists include:

  • Andy Stein, Vice President of North American Sales from Avery Design Systems
  • Adnan Hamid, CEO at Breker Verification Systems
  • Phil Moorby, Chief Architect of Montana, a Phil Kaufman Award recipient presented to him by the ESD Alliance and IEEE CEDA for inventing the Verilog language
  • Raik Brinkmann, President and CEO of OneSpin, an ESD Alliance Member Company
  • Prakash Narain, President and CEO at Real Intent, an ESD Alliance Member Company
  • Rick Carlson, ESD Alliance Member Company Verific’s Vice President of Sales and advisor to seven early-stage startups

The event is open free of charge to all Alliance member companies and DVCon attendees. Non-members of the Alliance or anyone without a DVCon badge are invited to attend for a fee of $40. Registration information and more details on the event can be found at: http://bit.ly/2kNWx6T

Helic Joins the Alliance

Helic, a leading supplier of EDA software for crosstalk analysis and signoff of high-frequency analog/RF and high-speed SoC design, is a new member of the Alliance. Helic joined for a variety of reasons, including networking activities such as the Phil Kaufman Award dinner, and emphasized the industry initiatives, such as Export, License Management and Interoperability, as important initiatives. It intends to be an active participant in all. Also noteworthy is the Market Statistics Service (MSS), a tool that will support Helic’s forecasting efforts.

Mark Your Calendars for Upcoming Alliance Events

More details will be forthcoming about “Energy Policy and Strategy for the IoT Era,” Thursday, March 23. A panel of experts will discuss how the California Energy Commission’s new rules and standards affect the semiconductor design ecosystem, including EDA, IP, embedded software and other technology vendors that supply products to PC system manufacturers.

Two weeks later, we’ll host the “CEO Outlook,” Thursday, April 6. It will feature members of the ESD Alliance Board: Simon Segars, CEO of ARM, Lip-Bu Tan, Cadence’s President and CEO, Wally Rhines, Chairman and CEO at Mentor, and Aart de Geus, Chairman and CEO of Synopsys. We’ll have more information soon.

Now is a good time to join the ESD Alliance! I’m available to answer any questions about the Alliance and why your company show join. Please contact me at bob@esd-alliance.org, or check out our website at: www.esd-alliance.org

DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IOTPLL


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