August 11th, 2016
It takes courage to re-launch an existing product rather than start from scratch, to announce a refreshed and updated offering as if it were something brand new. That’s certainly the case with Synopsys‘ recent release of TetraMAX II. It took courage to build on a franchise that first arrived on the scene not just in the last century, but in the last millennium.
And it was with this sentiment that Synopsys’ Robert Ruiz and I started a recent phone call to discuss the July news that TetraMAX II has arrived on the scene.
Ruiz began: “This is TetraMax II. We wrote the key engines from scratch, an effort that took the R&D team a full two years to complete. The goal was to get 10x faster and 25-percent fewer patterns.”
It’s fantastic to see that the ESD Alliance is following through with its new-found commitment to promote discussion about the IP industry. On Wednesday, September 14th, the Alliance is hosting an evening panel at their headquarters in Santa Clara to discuss semiconductor IP issues that “Keep You Awake at Night”.
As background, consider that the massive amounts of IP involved in building a modern SoC may translate into IP vendors losing millions of dollars if their IP is used therein without proper licensing. At the same time, semiconductor companies also wrestle with troubling issues if their engineers accidentally reuse a core without proper licensing, possibly exposing their employers to huge liabilities. The ESD Alliance event in September promises to address these thorny problems.
Moderated by industry leader Warren Savage – formerly CEO of IPextreme, but now GM of IP at Silvaco with the acquisition announced just prior to DAC – the evening’s two panelists come from interesting backgrounds.
As some of you may have seen, two years ago the IEEE created an app that ranks the popularity of dozens of programming languages. They use twelve different metrics, from search results and social media mentions to technical publications and requirements listed in job openings. If you don’t like the way that they use these metrics, you can create your own ranking using your own mix. It’s really quite a clever idea and it generates lots of discussion every year.
For 2014 and 2015, C held the #2 spot, just below Java in the rankings. The big news this year is that C has edged into first place, although the top two spots remain very close as measured by the metrics the IEEE has chosen to use. C++ was in the #3 spot for the past two years, but for 2016 flipped places with Python. As you all know, we are strong advocates of C/C++ for verification and so we’d like to share some thoughts on these results and what they mean for our industry.
Custom Compiler at DAC 2016
August 8, 2016 by Graham Etchells, Director of Product Marketing at Synopsys
DAC 2016 saw the first Synopsys custom design luncheon to feature Custom Compiler. It was a sold out event with 150 customer attendees eager to hear from Synopsys and other customers about how Synopsys is progressing in the custom design space. Antun Domic, Executive VP and General Manager of Synopsys’ Design Group moderated the event which included speakers from STMicroelectronics, GSI Technology, Samsung Foundry and the Synopsys IP team. For those of you who missed the live event, following is a short summary of the event highlights.
Antun opened the proceedings and presented Synopsys’ fresh approach to custom layout with Custom Compiler. He shared details of the pioneering visually-assisted automation technologies that speed up custom design tasks, reduce iterations and enable reuse.
Antun then went on to introduce each of the customer speakers who related their experiences using Custom Compiler and how visually-assisted automation helped them reduce their layout efforts from days to hours.
11 Verification Trends
August 5, 2016 by Lauro Rizzatti
A panel in DAC’s technical program this year continues to yield returns. I looked over my notes the other day and found that the moderator and the five panelists identified a few trends that are outside the scope of the traditional verification as known for many years.
Trend #1: Engineering and verification teams are becoming more strategic. They are looking more carefully at the objectives to determine which verification engine is best suited for the task.
Trend #2: Verification today encompasses much more than just simulation, engineering and verification teams acknowledge. It includes hardware-based verification, whether in the form of emulation or FPGA prototyping, and formal verification. It involves pre-silicon verification and post-silicon validation.
You are registered as: [email@example.com].
CafeNews is a service for EDA professionals. EDACafe.com respects your online time and Internet privacy. Edit or Change my newsletter's profile details. Unsubscribe me from this newsletter.
Copyright © 2017, Internet Business Systems, Inc. — 25 North 14th Steet, Suite 710 San Jose, CA 95112 — +1 (408) 882-6554 — All rights reserved.