EDACafe Weekly Review March 23rd, 2017

Users Talk Back on Portable Stimulus
March 17, 2017  by Adnan Hamid, CEO of Breker

At the recent DVCon, I had the pleasure to moderate a panel that enabled users to talk about their experiences working with the Accellera standard’s body during the creation of the Portable Stimulus standard. I would like to thank Accellera for enabling such a panel and to Nanette Collins for organizing the panel and making sure that I had the easiest role in the ensuing discussion. I am sure that full write-ups of the panel will emerge, but I wanted to make the voice of the users heard.

ESD Alliance Brings Back CEO Outlook
March 17, 2017  by Bob Smith, Executive Director

Please Note: With regrets, we are postponing the “Energy Policy and Strategy for the IoT Era,” the panel on the new energy rules for PCs from the California Energy Commission Thursday, March 23, due to unforeseen circumstances. Stay tuned for updates.

 After listening to our members who told us they missed the yearly CEO forecast, it’s a pleasure to let you know the ESD Alliance is bringing back an evening with the leaders of our industry. The 2017 CEO Outlook will be held Thursday, April 6, from 6:30pm until 8:45pm at Synopsys in Mountain View, Calif. A private reception for ESD Alliance members only to mingle with speakers will begin at 5:30pm.

Aart de Geus

Lip-Bu Tan

 

Simon Segars

Wally Rhines

Four of our industry’s most visible CEOs will discuss their views on the future of the system design ecosystem in what promises to be a wide-ranging and enlightening panel discussion. The four panelists for the evening are: Aart de Geus from Synopsys, Lip-Bu Tan of Cadence, ARM’s Simon Segars and Wally Rhines of Mentor Graphics. Each will share his views on where the semiconductor industry and system design ecosystem are heading, review trends and point out potential opportunities and danger signs ahead. After brief opening statements about the future of the industry, an interactive audience discussion will follow.

Ed Sperling

And who better to moderate the discussion than Ed Sperling, editor in chief of Semiconductor Engineering? For those of you who don’t know Ed, he is a long-time chronicler of the EDA, IP and semiconductor industry. His knowledge of the system design ecosystem runs the gamut of business to technology and methodologies.

The panel is open free of charge to all ESD Alliance member companies. Non-members are invited to attend for a fee of $25. Because seating is limited, please register today. More details and registration information can be found at: http://conta.cc/2m1ESxf

DownStream: Solutions for Post Processing PCB Designs
S2C: FPGA Base prototyping- Download white paper


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