EDACafe Weekly Review June 30th, 2016

Mark Gilbert: White coat, White hat, Big fish
June 30, 2016  by Peggy Aycinena

 


Exuberance and Optimism:
the only two words required to describe EDA-Careers’ Mark Gilbert – even after 20 years in the trenches sorting out the who what and where of just about everybody in the EDA industry. Yes, he self-identifies as the fun guy in the white suit, seen hither and yon wherever the EDA Nation chooses to confab, but in reality he’s the good guy in the white hat who’s going to tell it to you straight, about your career and your goals.

Also by his own description, Mark Gilbert is “the big fish in a little pond” who serves as the leading head hunter and career counselor extraordinaire of EDA.

I was lucky enough to speak with Gilbert by phone this week. As he and I were both on the East Coast, coordinating the hour of the call was easy. Our conversation started with the usual query: How did you get started in this business?

Opening a TrekBox for Your Birthday
June 29, 2016  by Tom Anderson, VP of Marketing

Over the more than three years of posts here on The Breker Trekker blog, you’ve seen us reference our TrekBox runtime component on many occasions. We mention it in many contexts: test case visualization, memory usage visualization, test case status, test case debugging, system-level coverage, performance analysis, I/O interfacing, UVM testbench control, and more. We’ve never had a post on TrekBox itself, so today we rectify that and fill in a few details that we haven’t discussed before.

Some of you are familiar with the term “trickbox” in the context of a simulation testbench. We found a nice concise definition of this term in an ARM patent: “Memory mapped (behavioral) test bench component to facilitate verification.” By writing to designated memory addresses, the processors in the design being verified can send messages to the testbench for various actions. Our TrekBox is of course a play on the “trickbox” name, and it provides many presents inside for those who open it.

DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
Real Intent Job


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