Graham P. Bell
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Accelerating Schematic Driven Layout of Analog ICs
February 3rd, 2012 by Graham P. Bell
A demonstration of how Schematic Driven Layout (SDL) is used in Tanner’s L-Edit using HiPer DevGen for analog layout acceleration.
This entry was posted
on Friday, February 3rd, 2012 at 12:00 am and is filed under Analog Mixed-Signal, Tanner EDA.
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