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Posts Tagged ‘TVS’

Hitting the Town with DVClub

Thursday, September 1st, 2016

For those unfamiliar with the idiom, “hitting the town” or “going out on the town” means heading out to make the rounds of bars, restaurants, theaters, clubs, etc. It’s usually used in a city where such entertainment options abound. The topic of today’s post on The Breker Trekker blog is a particular club, DVClub, that packs in plenty of solid technical information along with entertainment. You may not have to go far to hit one; a DVClub event is likely to be coming to your city soon.

The history of the Design Verification Club (DVClub) is quite interesting, stretching back more than ten years. It started as an informal event for verification engineers to get together to share stories and talk about new technologies to help them do their jobs. You might have noticed that, unlike DVCon, the title means “design verification” and not “design and verification.” This gathering is intended for semiconductor functional verification engineers.


A Further Preview of DVCon India 2016

Wednesday, August 24th, 2016

Three weeks ago, we published a post on The Breker Trekker blog that previewed some of the talks and tutorials on the technical program at the upcoming third Design and Verification Conference and Exhibition (DVCon) India on September 15-16 in Bangalore. More of the details on the conference are now available online, and for today we’d like to highlight some of the keynote addresses, panels, and poster sessions on the agenda that also stand out for us.

As always, the program and steering committees have put a lot of thought into keynote speakers who will take a wide view of not just the EDA industry, but the larger electronics industry that we serve. Mentor CEO Wally Rhines is always a great speaker who comes armed with lots of charts and statistics to support his positions. His talk on “Design Verification: Challenging Yesterday, Today and Tomorrow” will survey the history and evolution of verification while predicting some of the future challenges


DAC, DVClub, DVClub Europe, DVCon, DVCon Europe, DVCon India: Verification is Everywhere

Thursday, April 23rd, 2015

Perhaps the biggest cliche in EDA is that functional verification consumes 70% of a chip project’s resources and is growing. Variations on this statistic have been around for at least ten years, probably more. It’s quoted almost as much as Moore’s Law, which incidentally turned 50 this year. Although not as old, the observation that verification dominates SoC development is almost universally accepted. Some may argue the exact percentage, but the spirit remains the same. As a consequence of this state, verification content is turning up everywhere. In today’s post, I’d like to summarize some recent and upcoming events of interest, plus remind you of some related topics covered in previous posts.

My first updates involves DVClub, the informal gathering of verification professionals held in multiple locations around the world. Yesterday was DVClub Silicon Valley, held as usual at Dave & Buster’s mega-arcade in Milpitas. Olig Petlin presented “Formal property verification at AMD: Theory and Practice” to a good-sized crowd. The talk was a nice, comprehensive overview of formal analysis and how it is typically deployed, but I would have liked to hear more specifics about AMD uses it on their projects. Paradigm Works recently assumed management of DVClub in the USA and is doing an excellent job of reinvigorating the franchise with more events in more locations. Boston on May 13 and Austin on June 3 are next on the calendar.


S2C: FPGA Base prototyping- Download white paper

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