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Posts Tagged ‘SystemC’

EDA Hates C++. Wait, What – Back Up!

Friday, November 4th, 2016

Why is Accellera supporting the use of an industry standard language in the development of the Portable Stimulus Standard? (more…)

Guest Post: Open Source Requires Open Minds, Especially in EDA Verification

Wednesday, July 20th, 2016

Few recent announcements in the EDA, IP, or semiconductor industries have had the impact of SoftBank’s proposed US$32B acquisition of ARM. Many commentators have weighed in on this news. Today’s guest blogger, OneSpin Solutions Vice President of Marketing David Kelf, shares some thoughts on how changes to the ARM universe might intersect with ongoing changes in the open source community:

One side effect of the ARM acquisition news was an increase in the debate on the fascinating RISC-V Open Source processor development. Clearly this has the interest of a number of significant ARM users, judging by the recent workshop at MIT last week as one example, and might represent a significant game changer. It also begs the question on the application of Open Source, and indeed standardization efforts in general, in verification and how programs in this area might change the dynamics of increasingly closed environments from the two largest EDA vendors. (more…)

Verification Languages: Tower of Babel?

Wednesday, November 11th, 2015

One of the cliches we hear from time to time in the industry is “designers want to stick with a single language, but verification engineers love learning new things.” The implication seems to be that because verification engineers have diverse jobs that require them to juggle lots of different tools and models, they necessarily have to learn new languages and methodologies on a regular basis. Of course, they may not actually love learning new languages; doing so may just be in the nature of their work.

Regardless of whether or not they “love” new languages, it is clear that most verification projects involve multiple languages and multiple approaches. One way to gauge the current situation is to turn to the excellent survey that Mentor Graphics performs with Wilson Research Group every couple of years. Harry Foster wrote a series of posts on the Mentor verification blog that give considerable insight into what verification (and design) engineers are doing on real projects.

(more…)

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