As regular readers know, the Portable Stimulus Working Group (PSWG) of the Accellera System Initiative has been working for some time to develop a new way to define verification intent once and to be able to reuse that across all stages of the verification flow and to be able to reuse it across designs. This will dramatically increase verification efficiency and establish verification methodologies that are likely to be used for the next couple of decades. (more…)
Posts Tagged ‘NVIDIA’
We try to cover a variety of topics here in The Breker Trekker blog, focusing on technical information but mixing in some general industry analysis as well. Two of our most popular posts of all time have involved the annual semiconductor supplier rankings from IHS, Inc. and the large amount of semiconductor industry merger and acquisition (M&A) activity over the last few years. IHS released their 2015 results yesterday, so it’s time for an update on both of these topics.
Let’s start by catching up on the M&A front. When we last covered this topic in January, the acquisition of Freescale by NXP and the acquisition of Altera by Intel had both just completed late last year. These closed in time to be reflected in the 2015 supplier rankings. There were several other deals from 2015 that were still pending and, while some of them have now closed, their effects will not be seen until the 2016 results are in.
In last week’s blog post, I reported from the recent 16th International Workshop on Microprocessor Test and Verification (MTV) in Austin. I focused mostly on the panel “Portable Stimulus and Testbenches – Possibilities or Wishful Thinking?” that included representatives from ARM, Cadence, Mentor, Synopsys, Freescale (now NXP), and Breker (yours truly). The panel was most enjoyable, but only one of several highlights for me at MTV.
This week, I’d like to touch briefly on some of the talks and topics on the technical program that caught my ear. These reflected a number of research frontiers for verification as well as several real-world case studies of SoC design projects tackling tough verification challenges. Perhaps the best moment for me was hearing Altera, one of our customers, describe how they used our products successfully on a recent design.
Those of us of a certain age will remember the secret decoder rings promoted by various products and TV shows. They generally used a simple substitution code to map letters to numbers. According to Wikipedia these have been offered as recently as 2000, so perhaps they are known to younger readers as well. What’s germane to today’s blog post is that formal services company Oski Technology has cleverly used this device as a graphical element in promoting its “Decoding Formal” Club series.
I’ve reported before from these events, which I believe have been very effective at advocating for formal analysis, sharing tricks and techniques, and demystifying what was once regarded as an arcane academic approach to verification. Last week I attended another Decoding Formal Club forum and, as usual, was impressed by the depth of the presentations. Since formal is always a popular topic among readers of The Breker Trekker, I’m going to share a few highlights from that afternoon.
Earlier this year, we published an analysis of the semiconductor landscape that became one of the most-read posts in the history of The Breker Trekker. That’s not too surprising, since business topics tend to have wider appeal than detailed discussions about verification techniques. That post focused on the top 20 semiconductor companies and the many changes in that list over the last 15 years. We mentioned a number of noteworthy mergers, acquisitions, and spin-outs that contributed significantly to the dynamic nature of the market.
The first three quarters of this year have seen a huge uptick in merger and acquisition (M&A) activity among semiconductor companies. Although many of these deals have involved second-tier players, at least a few are significant enough to result in changes to the next Top 20 listing. Since we follow the chip industry closely, we thought we’d summarize some of the recent announcements and speculate a bit on what it all means.
By some measures, the EDA market is a dynamic one. Many of our technological advances have come from startups and small companies, a list that gets refreshed as new market needs arise and as former independents get acquired or merge. The technology changes constantly to meet the needs of the semiconductor suppliers and system houses that are our customers. However, when it comes to market leadership EDA is incredibly static. The same three big companies have been at the top for more than 20 years now, we believe ever since Cadence swallowed Valid in 1991 and Synopsys moved into the third spot. Of course there has been some shuffling among Cadence, Synopsys, and Mentor, but that has happened only a few times.
This is in sharp contrast to the semiconductor business. Although Intel and Samsung have been at the top for more than ten years, several different companies have been number three and four during this period, with many shuffles along the way. There has been constant churn below the top slots, with several dramatic success stories for new vendors emerging during this same period. Since semiconductor companies are a main source of sales for EDA, we pay a lot of attention to the market and how it evolves. In this post we show one noteworthy market assessment and discuss some of the reasons for the changes and some of the implications for the industry as a whole.