The Breker Trekker
Tom Anderson, VP of Marketing
Tom Anderson is vice president of Marketing for Breker Verification Systems. He previously served as Product Management Group Director for Advanced Verification Solutions at Cadence, Technical Marketing Director in the Verification Group at Synopsys and Vice President of Applications Engineering at … More »
It’s Never too Early to Start Thinking about DAC
March 30th, 2016 by Tom Anderson, VP of Marketing
For those of us who have been in the EDA business on one side or the other (or both), the Design Automation Conference (DAC) is one of the highlights of every year. I almost hate to admit it, but this year holds DAC number 29 for me. I’ve been to San Francisco, San Diego, Los Angeles, Anaheim, Las Vegas, Dallas, New Orleans, and Orlando, most of them multiple times. But one of the most fun locations was Austin, where DAC was held for the first time three years ago, and where we will return in just a few short months.
There will be plenty of time later for us to fill you in on what Breker will be doing at DAC this year. Since the program for the 53rd annual conference just went live, I thought I’d share some initial impressions and predict some likely highlights. Of course as an exhibitor I’m already deep in planning for the show, but I encourage all of you to review the program and start making your own plans. You’ll be sure to have lots of fun in Austin, and on the basis of the information available today I’m sure that this will be a great show.
The events actually start on Saturday, June 4, with the co-located WorkShop on System-Level Interconnect Prediction (SLIP). DAC itself starts on Sunday, June 5, with a choice of six more workshops. Gary Smith, alas, is no longer with us but his firm Gary Smith EDA lives on and will present their annual industry update, followed by an opening reception. This is one of the best industry networking events of the year, with almost every familiar face in EDA typically in attendance.
Monday, June 6 offers an incredibly diverse group of sessions, representative of the expansion of DAC content over the past few years. Again, we get to hear from the end consumers of the semiconductors enabled by EDA. They will cover such advanced applications as self-driving cars, custom hardware for algorithmic trading, interfaces to the brain, cloud infrastructure, and the Internet of Things (IoT). Technical topics covered in papers and tutorials range from thermal hotspot analysis to universal connectivity.
The program for Tuesday may be even more diverse. There are multiple co-located conferences on specific subjects, plus a wide range of technical sessions and panels. Three topics that sound particularly intriguing to me are biologically inspired electronic design, network-on-chip (NoC) advances, and improving processors for SoCs. There is also a specific focus on embedded systems, including the “Embedded TechCon” classes held all day Wednesday as well as Tuesday.
IoT topics seem to dominate in the sessions on Wednesday, including such vitally important issues as power consumption, security, sensing, computing, and communication. Talks on system IP configuration and verification from ARM and Arteris also caught my eye. Perhaps the most striking session title of the entire show is “Dr. Garble and Mr. Leakage in the Mystery of Secure CPUs” and its coverage of information leakage from operating processors.
Audiences at technical conference of all kinds love product teardowns, and this year DAC will not disappoint. Each day at 4:30 in the DAC Pavilion on the exhibit floor, the clever engineers from iFixit will take wrench and screwdriver to a popular consumer device. Monday’s victim is a so-called “hoverboard” and Tuesday’s a drone, with a to-be-determined Apple device on Wednesday. Each of these will be followed by a poster session from 5 to 6, and a reception from 6 until 7. The exhibit floor is open 10-6 all three days.
DAC closes on Thursday, June 9, with training courses on SystemVerilog, UVM, SystemC, C++ techniques, embedded security, and more. The day also offers two panels and a full slate of technical sessions, including advances in memory systems, architectures for deep learning, high-level synthesis, and lots more on security and embedded systems. Finally, there is a closing reception at 5:30, after which most attendees will need at least a day to recover from such an intense conference.
I have to say that I am once again impressed by the diverse yet deep sessions that the DAC committees have managed to pull together. I’m heading back to worrying about the details of our booth color scheme and our own events at DAC, but I will keep an eye on the program as it continues to be refined and will blog about any updates that I think are especially interesting. Please allow me to close by urging you to join us in Austin, and to let us know if you’d like to schedule a particular time with Breker.
The truth is out there … sometimes it’s in a blog.
Tags: Accellera, austin, Breker, cache coherency, cloud, dac, Design Automation Conference, EDA, functional verification, graph, graph-based, IoT, NoC, portable stimulus, scenario model, simulation, SoC verification, uvm, VIP