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 The Breker Trekker

Archive for March, 2014

Visibility into Running SoC Silicon? Tell Us More!

Tuesday, March 25th, 2014

As we mentioned in our last few posts regarding the DVCon and SNUG Silicon Valley events, Breker exhibited at both shows with an identical demonstration. We showed our latest product, TrekSoC-Si, generating a test case, downloading it into a commercial SoC (a TI OMAP4430 with dual ARM cores), and running in the actual chip. This demonstrated our ability to support all verification platforms, from ESL and RTL simulation through acceleration, emulation, FPGA prototyping, and silicon.

This demo attracted quite a bit of interest and some good questions at both shows, so we thought we’d devote this blog post to filling in a few of the details. We especially want to stress that we provide exactly the same level of visualization for a multi-threaded, multi-processor test case running deep inside an actual chip as we do when it’s running in simulation or simulation acceleration.

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Please Visit Us at SNUG Silicon Valley Next Monday

Wednesday, March 19th, 2014

Perhaps by now you’re tired of reading about DVCon, but our last few posts have drawn very good readership so we know that the show is important to the verification-minded engineers who read The Breker Trekker. Another show, or more accurately a series of shows, has strong verification content and draws well from the verification community. We’re talking about the series of Synopsys Users Group (SNUG) events held worldwide to much acclaim from attendees and participating vendors.

According to the SNUG site, Synopsys has 13 shows scheduled annually in Asia, Europe, and North America, drawing nearly 9000 users. That’s a very impressive series of events by any measure and a sign that the EDA market leader invests heavily in educating its users and providing a forum where they can interact among themselves and with Synopsys technical experts. Next week is the 2014 edition of SNUG Silicon Valley, and we want you to know that Breker will be there.

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Final Report on the Big DVCon 2014 Show

Monday, March 10th, 2014

In our last two posts, we talked about the 2014 edition of the Design & Verification Conference & Exhibition, DVCon, in San Jose. Now that the show is history, lots of bloggers are summarizing their experience. Since I thought that this was an excellent event all around, allow me to join the chorus of voices praising DVCon 2014.

Here at Breker, our biggest effort goes toward the exhibition. Although it’s a relatively small booth and exhibit floor, we do want to put our best foot forward. So we had all-new signage this year updating attendees on our products and their capabilities. We also showed a very different demo from last year, with our TrekSoC-Si product generating a test case, downloading it into a commercial SoC (a TI OMAP4430), and running in the actual chip. We chose to repeat our very popular giveaway from DAC: a combined flashlight and distress whistle that will come in handy if you perform inadequate SoC verification and hit an iceberg.

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Half-Time Report from DVCon in San Jose

Tuesday, March 4th, 2014

As we write this post, it’s Tuesday evening and the Design & Verification Conference & Exhibition 2014, DVCon, is halfway over. We could be traditional and have a college marching band entertain us and form schematic diagrams on the field as we wait for the show to resume. We could hire some entertainer whose appeal has faded and who’s willing to do half-time shows to try to resurrect his or her career. But instead we’re going to settle for a simple report.

Monday evening featured, for the first time, an early look at the exhibition floor. DVCon reported that the show has a record number of exhibitors this year, and in fact they spilled out of the DoubleTree ballroom into the lobby. In a time when so many conferences are shrinking, the news that DVCon is growing is most welcome.

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DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL



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