The Breker Trekker
Tom Anderson, VP of Marketing
Tom Anderson is vice president of Marketing for Breker Verification Systems. He previously served as Product Management Group Director for Advanced Verification Solutions at Cadence, Technical Marketing Director in the Verification Group at Synopsys and Vice President of Applications Engineering at … More »
Guest Post: A Journey from Nano-Scale SPICE Modeling to Giga-Scale SPICE Simulations at DAC
July 29th, 2013 by Tom Anderson, VP of Marketing
The recent guest post from OneSpin looking back at the Design Automation Conference (DAC) in Austin was very popular, so we’ve invited some more of our friends from the EDA community to share their experiences. This week we hear from Lianfeng Yang, Vice President of Marketing at ProPlus Design Solutions, Inc.:
This year’s DAC proved to be a journey from Nano-scale SPICE modeling to Giga-scale SPICE simulations and a place where attendees could learn the secrets of design for yield (DFY) during a Wednesday afternoon pavilion panel.
After years of overlooking DFY, DAC hosted several technical sessions on the topic, including a panel co-organized by ProPlus titled, “Learn the Secrets of Design for Yield.” Foundry and EDA experts served as panelists with a range of perspectives, including DFY, design for manufacturing (DFM), and SPICE modeling/simulation: Dr. Min-Chie Jeng from TSMC; Dr. Luigi Capodieci from GLOBALFOUNDRIES; and ProPlus’ Dr. Bruce McGaughy. It was moderated by Pete Singer, editor in chief of Solid State Technology, now part of Extension Media, publisher of Chip Design.
GLOBALFOUNDRIES’ Tom Wong was a member of the DAC Pavilion Panel Committee and was the other organizer. He counted more than 60 people in attendance and noted that all panelists capably articulated their viewpoints and shared their expertise in their respective areas. Additionally, he polled a number of people who attended the panel. The general feedback was that the audience walked away with the sense that they learned something from the discussions.
We were delighted by the number of DAC attendees and other EDA vendors who stopped by our booth to talk about variation analysis (or DFY) and circuit simulation. Over the three days of DAC, attendees confirmed that process variation is becoming increasingly more challenging, especially for sub-45nm design. Design teams are starting to make variation analysis a mandatory step for advanced designs and realize the need for a reliable and practical variation analysis solution. SPICE models play a critical role in DFY analysis, serving as foundry-provided insight into the statistical space any high-yielding design must cover. A reliable and high-performance, highly accurate SPICE simulator with good statistical analysis capabilities is a key to making variation analysis possible. The simulator must be able to effectively handle the scale required by post-layout simulation, increasingly a basic sign-off requirement for deep nanometer designs.
Design and CAD experts from IC companies from around the globe came to DAC looking for answers to their need for variation analysis, resolving that an integrated DFY methodology was the solution. Disparate tools reduce efficiency and are not productive.
Ah, so good to hear! Yes, ProPlus demonstrated a highly integrated DFY solution that includes advanced statistical modeling, a high-capacity, high-performance SPICE simulator and statistical circuit analysis tools.
This DAC gave ProPlus a sense of great accomplishment. We kicked off 2013 with a goal to increase our awareness and visibility and to sharpen our focus and messaging so as to highlight our key differentiation and core values. In April, we announced NanoSpice, the industry’s first giga-scale SPICE simulator, to meet design challenges requiring high-capacity and high performance SPICE-simulations. NanoSpice is foundry validated for advanced nodes, and shares the same core SPICE engine with BSIMProPlus, the de-facto golden device modeling software used by all leading foundries celebrating its 20th anniversary. We heard from many DAC attendees that NanoSpice is exactly what the market needs now. It is, as they told us, the future. And, our post-DAC experience with many leading design companies is equally positive. Design teams come to us because they need to run large cases with high accuracy.
To celebrate BSIMProPlus’ 20th anniversary and DAC’s 50 years of innovation, ProPlus was a contributing sponsor of the DAC party, Kickin’ it Up in Austin, and kick it up we did. It was a great evening.
Readers of The Breker Trekker blog may wonder why ProPlus is not as familiar as some of the longtime EDA stalwarts and yet we’re celebrating 20 years of BSIMProPlus. In 1993, we were founded as BTA Technology, the leading provider of SPICE modeling tools (BSIMPro) and FastSPICE circuit simulator (UltraSim). BTA merged with Ultima in 2001 to form Celestry Design Technologies, acquired by Cadence Design Systems in 2003. In 2007, a group of Cadence employees spun out the Celestry products from Cadence and established ProPlus Design Solutions. Many of our core team members started at BTA Technology in the 1990s.
DAC proved we met our goal and was a memorable event. Our position that giga-scale SPICE simulation is an emerging need and DFY must be a complete and integrated solution to be effective has been heard. We’ll have even more to demonstrate at next year’s DAC in San Francisco!
To learn more about ProPlus and our range of products and solutions, please visit www.proplussolutions.com.