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 Stan on Standards
Stan Krolikoski, Group Director of Standards, Cadence
Stan Krolikoski, Group Director of Standards, Cadence
Stan Krolikoski is Group Director, Standards at Cadence Design Systems. Stan has been involved in EDA standards for over 25 years and served as a leader in Standards groups such as the IEEE, Accellera, OSCI, SPIRIT and Si2. He is currently Chair of the IEEE Design Automation Standards Committee, … More »

Japan & SystemC

July 15th, 2010 by Stan Krolikoski, Group Director of Standards, Cadence

With all of the excitement in the “front end” of the SOC design/verification/modeling community about Accellera’s UVM, it is easy to loose track of work being done around another significant front end language—SystemC.  For those not aware, there is an IEEE group (P1666-2011) that is working diligently on updating the very popular 1666-2005 release of SystemC that was originally developed by OSCI.  The charter of the current IEEE SystemC group is to add clarifications and fix errata in the 2005 standard, add  TLM 2.0 and formalize the description of the TLM 1.0 message passing facility.  There will likely also be several new features added that do not already exist in the OSCI version of SystemC, including process control extensions.  Work is expected to wrap on this new version of IEEE SystemC in late 2010, with final approval in the first half of 2011.

The “entities” that belong to this IEEE SystemC P1666 committee are Accellera, Cadence, Freescale, Intel, JEITA, Mentor, NXP, OSCI, ST Micro, STARC, Synopsys and Texas Instruments.  Note that this is a very geographically diverse group, with representation from the US, Europe and Japan.  Indeed, when I (as chair of the group) hold a P1666 teleconference, I typically find in the conference call summary report more than 10 different country codes for the phone numbers of the attendees (including non-member observers).

The country where SystemC may—a very non-scientific “may”, based on an educated gut feel– have gained the most traction is Japan.  Two events that I recently attended in Japan point to this popularity of SystemC in that country—one overtly and one more subtly.  The first was the day-long “SystemC Japan” symposium that was held in Shin-Yokohama on July 2.  This event featured speakers from both EDA and User companies talking about SystemC products and the language’s use in projects. The seminar attracted 448 attendees, and had a considerable waiting list, since the room in which it was held could not accommodate a larger crowd.  Of course, 448 is a nice size crowd under any circumstances, but consider that this event was not held in conjunction with any other event such as a trade show, and was held in Shin-Yokohama, not in Tokyo or Osaka where many major electronics companies are headquartered.  Add in the fact that the continuing economic downturn has globally reduced attendance at such events, and the fact that 448 people attended speaks volumes about the place of SystemC in the Japanese Electronics world.

Part of the crowd at the July 2 SystemC event in Shin-Yokohama

Part of the crowd at the July 2 SystemC event

I would also add an observation as an non-Japanese outsider.  At many Japanese public events, the audience is fairly passive.  On the contrary, while I would not classify the audience at SystemC Japan as “raucous”, there was a palpable sense of energy that manifested itself in a surprising number of questions from the audience, and lots of energetic discussions during the breaks.  I was particularly impressed that the room was very nearly as filled at 5:30 PM on a Friday as it had been at 10 AM.  All in all, SystemC Japan spoke very well for the future of SystemC in Japan (and elsewhere, given Japan’s place in the Electronics ecosystem).

Speaking with less volume about SystemC’s place in Japan, but perhaps as importantly, was a world-wide meeting of the IEEE P1666 Working Group that took place (also in Shin-Yokohama) the day before the SystemC Japan event.  Sharp-eyed readers will have noticed that both STARC (a consortium of Japanese Semiconductor Companies) and JEITA (the Japan Electronics and Information Technology Industries Association, under which falls groups that track EDA standards) are both members of the P1666-2011 group.  Both of STARC and JEITA have been tracking SystemC’s progress very closely, and JEITA has submitted a detailed list of proposed clarifications/feature requests to the IEEE SystemC committee to consider.

Hiroshi Imai (JEITA/Toshiba), Kaz Yoshinaga (STARC), Satoshi Kojima (JEITA/NEC) & Kiyoshi Makino (JEITA/Mentor) at the P1666 meeting

Hiroshi Imai (JEITA/Toshiba), Kaz Yoshinaga (STARC), Satoshi Kojima (JEITA/NEC) & Kiyoshi Makino (JEITA/Mentor) at the Shin-Yokohama P1666 meeting

Representatives from both STARC and JEITA attended the P1666 meeting held in Shin-Yokohama, as they have via telephone in prior months when the meetings were held during the middle of the night Japan time.   During the meeting, John Aynsley of Doulos, who is leading the P1666 technical effort, discussed the JEITA requirements, and made it clear that all of them with one minor exception will be addressed in the upcoming release.  Hiroshi Imai of Toshiba, who also heads the JEITA “SystemC Working Group”, acknowledged that John had correctly understood their requests.  Thus, it appears certain that Japan’s voice will be clearly heard—as will be other regions—when the new IEEE SystemC is released next year.

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One Response to “Japan & SystemC”

  1. Gary Dare says:

    Stan, Sony is a famous case of corporate adoption of high-level design, at least with C/C++ and probably SystemC and TLM-2.0 by now. Their strategy has been covered in non-technical forums like the New York Times’ Science section on Tuesday (a year or more ago).

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