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The Power of Dynamic Voltage Frequency Scaling

Thursday, September 3rd, 2015

Battery life in consumer electronics is dependent on the dynamic power behavior of their integrated circuits.  If that dynamic behavior can be adjusted to fit the task at hand, then considerable power savings can be realized.  In CMOS circuits most of the dynamic power is consumed in the parasitic capacitance of their digital gates.

The equation for dynamic or transient power can be written as follows:

pwr-eqn
where

pwr-eqn-2

 

 

 

 

 

 

The combination of supply voltage and frequency has a cubic impact on total power dissipation because dynamic power consumption has a quadratic dependence on voltage and a linear dependence on frequency. An intelligent power savings solution would reduce operating frequency and, at the same time, reduce the supply voltage. Some example commercial implementations of dynamic voltage frequency scaling (DVFS) technology are Intel’s SpeedStep and AMD’s PowerNow.  According to the 2014 Calypto RTL Power Reduction Survey, 24% of designs used DVFS.

Click here to read the rest of this article originally published on EETimes SoC Designlines.

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