With the slow down in Moore’s law, technologists are now speculating on what future integrated circuits will look like. One constraint is the clock frequency of CMOS processors, which is topping out at around 4GHz for high-end processors in the 100W range, down to around 1-2GHz for ~5W processors used in laptop and mobile applications. With this constraint on clock speed, IC designers are adding more cores to increase processing throughput. Along with these additional processors is an increasing need for easy access to high-speed memory. Performance will not be achieved if multiple processors are contending for shared memory access.
One solution to this challenge are new 3D-manufacturing technologies in combination with new chip architectures to overcome the bandwidth-latency barrier in high-count multi-core chips.
The following will be the key enablers for 3D manufacturing: (more…)