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Archive for February 5th, 2015

A Personal History of Transaction Interfaces to Hardware Emulation: Part 2

Thursday, February 5th, 2015

In part one, I shared how Dan Hafeman, CTO at IKOS Systems, championed the use of transaction-level interfaces to hardware emulation, but it had not caught on (except for one very large and generous customer) by the time of the dot-com crash in the early 2000’s.

Since this is a personal history, I’ll start this part with a bike ride. In October 2013, John Stickley took me on a 40-mile bicycle tour from Fort Lee, NJ, to Brooklyn, NY, and back (amazingly, Manhattan is bike-friendly now!)  John was one of those R&D engineers who had worked with our customer in the late 90’s on the SystemC modeling side.  Ever since, John has been at the center of the emulation transaction modeling world, for IKOS and then for the Mentor Emulation Division after the acquisition of IKOS by Mentor Graphics.

Since I’d last seen John, I’d had the chance to write a SystemC-based interface to ARM Fast Models (ARM’s high-level processor and other models) using TLM2, the transaction-Level Modeling API standard. I’d been out of transaction-based modeling for 10 years, but this was an “Aha!” moment. This was what we had needed back at the turn of the century! The rest of the world had finally caught up to what we had created back then.

John and I had a chance to talk about this after the bike ride, and he agreed with me completely. John was always enthusiastic, but now especially so.

John Stickley on the Brooklyn Bridge

John Stickley on the Brooklyn Bridge

What happened?

At this point, I’m not the best person to write the history of transaction APIs, but I can try.

First, Accellera standardized the transaction interfaces to emulation as SCE-MI (standard co-emulation modeling interface). The Open SystemC Initiative finally achieved what the Virtual Socket Interface Alliance could not and created a TLM (transaction-level modeling) standard as part of SystemC. TLM2 followed, and I suspect what really launched it was the extensions mechanism.

People will criticize TLM2 for being simple, but it needs to be: address-based reads and writes, basically — and the extensions mechanism offers at least a standard escape hatch for bus-specific features. When ARM created its mapped-instruction-set processor models, they could create the necessary extensions specific to the AMBA bus.

Then Accellera, spearheaded by John Stickley, moved to a later generation standard, SCE-MI 2, which implemented a multi-channel transaction interface that naturally integrated with other modeling interfaces like SystemVerilog DPI (direct programming interface) and TLM2. With easily interoperable standards-based interfaces, plus the availability of high-level models and tools, an entire ecosystem was possible. Now, everyone is talking about this use model with emulators, and even yet higher-level use models like scenario-based test bench generation.  In some cases, you can build transaction-based environments that test packet-based systems more richly than in-circuit emulation ever could!

It was good to see an idea that was ahead of its time, as originally conceived at IKOS, finally become well-established in verification. This involved the efforts of not just the IKOS people, most of whom are still developing the technology at Mentor, but also the other vendors, standards bodies, and customers throughout the market.

I was always especially proud of the original IKOS effort, because it was the first large and critical project I had led.  But I was even prouder to tell its original inventor, Dan Hafeman, that his long ago idea was now mainstream, and had changed the industry.

This brings my retrospective to the end.  If I missed an important piece of the story let me know.

 

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