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Srinivas Vaidyanathan
Srinivas Vaidyanathan
Srinivas is staff technical engineer at Real Intent and deeply involved with the Ascent product line. Previously he was Sr. IC Design Engineer at Broadcom for 6 years where he was responsible for both verification and validation of Ethernet devices. He has worked at Hexaware as a verification … More »

Is Platform-on-Chip The Next Frontier For IC Integration?

 
October 30th, 2014 by Srinivas Vaidyanathan

I was musing the other day about the completeness of SoCs – they include a mix of embedded processors for programmable functionality, hardware engines that accelerate specific features such as graphics, and multiple interfaces for memory, buses, and peripherals. And this remarkably complete solution is delivered on a single die. We have the perfect building block for creating systems with high-value and low-cost. But, even with Moore’s law allowing us to build more complex silicon, is new feature integration a scalable future for SoCs?

My conclusion is that we are approaching a steady state. From what I see, SoC design is still a custom solution in many ways, tailored to fit a generation of parts that meet some specific requirements. While complete in itself, the features cast in silicon offer only a coarse control of functionality. This leaves the end-user having to provide additional software and hardware to fill in any feature gaps at additional cost and time spent. While the intended and configured functions of the SoC might been implemented, any feature extensions may have compromises in performance.

When choosing between speed and configurability, designers make the choice of using either software running on a processor, or custom dedicated hardware. Software is ever forgiving, allowing multiple iterations towards the desired goal. On the other hand, hardware’s rigidity offers quick and reliable execution. Ideally, any desired feature enhancement would sit somewhere in this speed-configurability spectrum. Including this option in the SoC arsenal would allow for the perfect platform to unlock additional potential from hardware.

If we borrow an idea from the world of FPGAs, SoCs can gain significant versatility in providing the reconfigurability of software in dedicated hardware. Traditionally, FPGAs are looked at for hardware designs that are continually evolving; giving design teams the flexibility of keeping pace with change without the capital expenditure necessary for fixed silicon. For SoC customers, however, the constraints on area and power are just as critical as cost. Hence, a viable solution could be to include Programmable Gate Arrays (PGAs) in SoCs. In doing so, the choice of enhancing hardware can be weighed in context to other requirements. Importantly, this pushes out the hardware-software partitioning decision to much later in the product cycle, than currently available to developers today.

While the hybrid concept of mixing fixed silicon with FPGAs has been explored before, the key difference today is the growing software developer community that has been built around SoCs. To put this in context, consider the organization of the Andriod Software Stack on a SoC, using the example of the Ti-OMAP in the figure below. You can see there are fixed associations between the underlying hardware and the upper layers of software abstraction. However, introducing a PGA in hardware adds a completely new dimension to the software stack. Software libraries that were previously routed through the processor, for lack of a dedicated hardware, can now be offloaded to custom hardware created on-the-fly. Even libraries that have dedicated hardware accelerators, like graphics, can be augmented to cater to customized product requirements. By using some imagination, we can envision self-evolving hardware, morphing to suit the dynamic demands that applications place.

PoC-620

Figure1. Android Software Stack Visualized on a Platform-on-Chip using the Ti-OMAP3530 as an example.

Obviously, there is more work required in the software stack to ensure that the generated hardware does not violate system parameters. But with that said, the capabilities in an architecture that bundles SoC and PGAs on a single die has the potential to be the ideal platform for endless product possibilities. I call this new innovation Platform-on-Chip (PoC).

While an interesting idea, is there a market for PoC? Consider Google’s Project Ara, a modular smart phone that is designed to swap out modules to suit the end-users’ usage needs. Among its many goals, this device is aimed at reducing e-waste by allowing the user to “upgrade individual modules as innovations emerge” . For a SoC, the possibilities of adding customized features, however, are restricted to the breadth of options the underlying SoC provides. With a PoC and its PGA component, emerging innovations are allowed more room to grow, and further extend the platform’s lifetime. Extrapolating the idea even further to the impending growth of the Internet of Things (IoT), there would be new ways for developers to re-purpose silicon in meeting with non-standard requirements at faster hardware speeds. A parallel topic of application could also be security. In an era where personal information is increasingly finding its way onto Internet enabled devices, real time reconfigurable hardware can offer stronger means of achieving identity protection.

If we have reached the end of innovation for SoC, do you think PoC could be the answer?

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