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Graham Bell
Graham Bell
Graham is VP of Marketing at Real Intent. He has over 20 years experience in the design automation industry. He has founded startups, brought Nassda to an IPO and previously was Sales and Marketing Director at Internet Business Systems, a web portal company. Graham has a Bachelor of Computer … More »

Fundamentals of Clock Domain Crossing: Conclusion

 
August 28th, 2014 by Graham Bell

In our last post in series, part 4, we looked at the costs associated with debugging and sign-off verification.  In this final posting, we propose a practical and efficient CDC verification methodology.

Template recognition vs. report quality trade-off

The first-generation CDC tools employed structural analysis as the primary verification technology. Given the lack of precision of this technology, users are often required to specify structural templates for verification. Given the size and complexity to today’s SOCs, this template specification becomes a cumbersome process where debugging cost is traded for setup cost. Also, the checking limitations imposed by templates may reduce the report volume, but they also increase the risk of missing errors. In general, template-based checking requires significant manual effort for effective utilization.

Top-level vs. block-level verification trade-off

The top-level verification reduces the setup requirements for CDC verification but can result in higher debugging cost as the design maturity improves iteratively. On the other hand, block-level verification identifies errors earlier and at smaller complexity levels, creating a cleaner top-level verification. The top-level debugging cost is reduced but the overall setup and run-time cost increases.

RTL vs. netlist verification trade-off

As mentioned earlier, netlist analysis can cover all the CDC error sources. The debugging cost is very high for application at the netlist level. Also, the delay in detecting errors until much later in the design cycle can have a serious impact on schedules. But RTL analysis does not cover all CDC-error sources, and this requires that CDC verification also be run on netlists.

A practical and efficient CDC verification methodology

After evaluating the various considerations as mentioned above, we recommend the following CDC-verification methodology to accomplish high-quality verification with minimal engineering cost:

  • Automatically create the functional setup the top-level design leveraging SDC.
  • Automatically complete the functional setup.
  • Use setup verification techniques to refine top-level functional setup.
  • Identify the sub-blocks for initial CDC verification.
  • Automatically generate block-level functional setup from the top-level.
  • Run thorough block level CDC verification.
    • Examine the generated functional setup for correctness.
    • Run structural analysis.
    • Identify and fix gross design errors or refine functional setup.
    • Run formal analysis for precise error identification.
    • Debug and fix design or refine functional setup.
    • Iterate verification steps until clean.
  • Run thorough top-level CDC verification with block-level result inheritance.
  • Run thorough netlist CDC verification.
Figure 16. A top down-bottom up verification flow.

Figure 17 compares the characteristics of first- and second-generation CDC tools across seven different categories. It summarizes the advantages of this new generation of design verification with the most dramatic change being in the efficiency of sign-off warnings, debug and verification methodology. We believe that sign-off verification is now possible and more importantly is a requirement for complex SOC designs.

Figure 17. Spider chart for first-generation and second-generation CDC tools.

In summary

Today, the number of clock domains in a complex SOC design can easily exceed 100 and the gate-count is well over 100 million instances. The first generation of CDC tools were not engineered to handle this kind of complexity and a second-generation tool-set is essential to reduce CDC failure risk and to avoid wasting engineering resources. This second generation maximizes automation and uses special formal techniques and automatic generation of top-level and block-level setups to accomplish high-quality verification. A hierarchical top-down, bottom-up methodology that takes advantage of the inherited results of both top- and block-level analysis minimizes the manual debug effort in CDC verification.

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