Open side-bar Menu
 Real Talk

Archive for February, 2014

DVCon Panel Drill Down: “Where Does Design End and Verification Begin?” – Part 3

Thursday, February 27th, 2014

At last year’s Design and Verification Conference (DVCon) in San Jose, Real Intent sponsored a panel on “Where Does Design End and Verification Begin?”  In this Part 3 we are continuing with the questions from the moderator and answers by the panelists.

The panel was moderated by Brian Hunter, Cavium, Inc. and panelists:

Pranav Ashar – Real Intent, Inc.
John Goodenough – ARM, Inc.
Harry Foster – Mentor Graphics Corp.
Oren Katzir – Intel Corp.
Gary Smith – Gary Smith EDA

Below are links into the video recording where the question is asked and the immediate replies and comments by the panelists.  Starting with Questions 15 the panelists shared several interesting insights about gaps with verification test-sets, and higher level modeling and had a lot of back and forth with the other members. (more…)

DVCon Panel Drill Down: “Where Does Design End and Verification Begin?” – Part 2

Thursday, February 20th, 2014

At last years Design and Verification Conference (DVCon) in San Jose, Real Intent sponsored a panel on “Where Does Design End and Verification Begin?”  In this Part 2 we are continuing with the questions from the moderator and answers by the panelists.

The panel was moderated by Brian Hunter, Cavium, Inc. and panelists:

Pranav Ashar – Real Intent, Inc.
John Goodenough – ARM, Inc.
Harry Foster – Mentor Graphics Corp.
Oren Katzir – Intel Corp.
Gary Smith – Gary Smith EDA

Below are links into the video recording where the question is asked and the immediate replies and comments by the panelists.  The end-user insights by Goodenough from ARM and Katzir from Intel are particularly interesting. (more…)

DVCon Panel Drill Down: “Where Does Design End and Verification Begin?” – Part 1

Thursday, February 13th, 2014

At last years Design and Verification Conference (DVCon) in San Jose, Real Intent sponsored a panel on “Where Does Design End and Verification Begin?”

The panel was moderated by Brian Hunter, Cavium, Inc. and panelists:

Pranav Ashar – Real Intent, Inc.
John Goodenough – ARM, Inc.
Harry Foster – Mentor Graphics Corp.
Oren Katzir – Intel Corp.
Gary Smith – Gary Smith EDA

Brian opened the panel with the following remarks and then asked a series of questions.  Below are links into the video recording where the question is asked and the immediate replies and comments by the panelists.  If you don’t have time to listen for the full 20 minutes, jump down to Questions 6, 7 and 8 to see the highlights for part 1.  Next week we present part 2.

(Brian Hunter begins) Our topic today is the blurring lines between design and verification. Most people know that verification schedules are the long pole and getting too long and we need designers to take on a larger role in the verification process. (more…)

Video Tech Talk: Changes In Verification

Thursday, February 6th, 2014

Ed Sperling, Editor-in-Chief of SemiEngineering.com spoke with Dr. Roger B. Hughes, Director of Strategic Accounts at Real Intent, about what’s changing in verification as design complexity increases and where engineers typically make mistakes.

DownStream: Solutions for Post Processing PCB Designs
S2C: FPGA Base prototyping- Download white paper
TrueCircuits: UltraPLL



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy