Open side-bar Menu
 Real Talk
Graham Bell
Graham Bell
Graham is VP of Marketing at Real Intent. He has over 20 years experience in the design automation industry. He has founded startups, brought Nassda to an IPO and previously was Sales and Marketing Director at Internet Business Systems, a web portal company. Graham has a Bachelor of Computer … More »

2013 Highlights And Giga-scale Predictions For 2014

 
January 2nd, 2014 by Graham Bell

There were 5 key developments that stood out for me in 2013 and I have 4 predictions for 2014 I think would of interest to the EDACafe audience.

2013 Highlights

  1.  We are now in the world of 8-core processors. Both the new Xbox One and the Sony PS4 gaming systems employ big 8-core AMD CPUs. And MediaTek has announced the MT6592, the first cell-phone chip that uses 8 ARM A-7 processors running simultaneously at 2GHz. I know, I know, you are asking yourself “do I really need 8-core functionality in my pocket?” Probably not this week, but soon you will wonder, “How did I live without it?”
  2. The 50th anniversary of Design Automation Industry was celebrated this year with a gala event in Silicon Valley to raise money for the EDA Oral History Project. The EDA Consortium’s “Back to the Future Event” had more than 250 in attendance and had a wonderful vibe. There was even a psychedelic time tunnel. Everyone I spoke to afterwards told me what a good time they had. Kudos go out to Kathyrn Kranen, Chair of EDAC, and to Bob Gardner and Jennifer Cermak, staff members who put it all together with a host of sponsors including Jill Jacobs from MOD Marketing. The industry is really founded and runs on the genius and talent of so many people. Click on the link to find out more: http://www.edac.org/events/back_to_the_future/presentation
  3. At the Design and Verification Conference last February, there was a panel (“Where Does Design End and Verification Begin?“) that discussed the impact of new kinds of verification tools that focus on just one problem area and thereby enable more effective verification. Engineers no longer have to craft a needed solution out of their own dynamic simulator, static timing analyzer, or assertion based verification (ABV) formal tools. In the example of Meridian clock-domain-crossing (CDC) verification, a mix of structural, formal and dynamic methods operating under-the-hood, ensure that an SoC will not fail with a metastability issue. Other examples are state-of-the art Lint analysis, and X-propagation and reset verfication/optimization. At Real Intent, we call this new category Static Verfication. Gary Smith of GSEDA calls them Verification Apps. I see these as important addition to our tool chest so engineers don’t design SoCs that we cannot verify.
  4. There were a number of acquisitions by the Big Three to improve both their IP and tool portfolios. Cadence snapped up Cosmic Circuits (A&M/S cores), Tensilica (custom low-power processors), Evatronix (USB, MIPI, display and storage controller IP). Mentor is acquiring Oasys Design Systems for their synthesis, placement and floorplanning technology called RealTime Designer that works at the RTL level. Synopsys is still digesting the SpringSoft and EVE acquisitions that closed in late 2012.
  5. There has been continued progress on the design standards front: Accellera Systems Initiative completed the SystemC AMS 2.0 standard for mixed-signal design, and the initial release of the Soft IP Tagging standard was announced (Is a specific IP in this chip? Is it the right version? Can I reuse it?).

Predictions For 2014

  1. SNPS will have more than $2B in revenue, which is a new high-water mark for the EDA industry.
  2. Real Intent will be keeping pace with new technology and new methodologies that go beyond traditional simulation, timing analysis, and assertion verification and makes verification happen earlier. Early verification of all kinds of failure modes—CDC, SDC, power—all of that has moved into RTL functional space and all of them are happening concurrently. We think the deployment of ‘bottoms-up’ hierarchical flow can be effective for giga-scale designs, but only if a waiver-less approached is used. The challenge in 2014 will be to continue giving signoff-accurate results in hours and not days or weeks, to meet the time-to-market demands of our semiconductor customers.
  3. The KPMG Global Semiconductor Survey just announced the expectations of senior leaders of the world’s leading semiconductor companies. The survey shows continuing optimism about growth for the coming year. Specifically of interest to the EDA industry is the survey’s report that more than three-fourths of execs expect semiconductor-related R&D spending to increase in the next fiscal year, similar to last year. Because EDA growth tracks semiconductor R&D spend, this is a positive sign for the year ahead.
  4. And of course, more acquisitions by the Big Three.

Best Wishes for a Prosperous 2014!

Related posts:

Leave a Reply

Your email address will not be published. Required fields are marked *


*

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>

CST Webinar Series



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy