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Archive for June, 2013

Value of a Design Tool Needs More Sense Than Dollars

Thursday, June 27th, 2013

It is interesting when I talk to purchasing managers at semiconductor companies and they use the dollar cost for a tool as the measure of its value.

Tool value can be hard to quantify and a price tag will not tell the whole story. The real cost behind any tool is the engineering effort to use the tool and the real time-saving and efficiency it brings to design teams.

The Meridian CDC solution from Real Intent, for  example, is often compared to tools from other vendors. When technical decision makers are involved, the value is very obvious since they can quantify the difference in effort.

It takes much less time to debug the results. Why? Because Meridian CDC analyzes the complete interface of the crossing and it reports how data and control crossings are associated. This generates dramatically fewer violations for review, despite the fact that all analysis rules are always turned on. Needless to say, having all rules on all the time helps in NOT missing design bugs.

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Lending a ‘Formal’ Hand to CDC Verification: A Case Study of Non-Intuitive Failure Signatures — Part 2

Thursday, June 20th, 2013

In Austin, at the 50th DAC earlier this month,  I delivered a poster presentation on “Lending a ‘Formal’ Hand to CDC Verification: A Case Study of Non-Intuitive Failure Signatures”.   In this second blog in a series, I discuss a set of failures in a common clock domain crossing synchronizer.

The design used for this case study closely mirrors the CDC synchronization scheme shown earlier in Part 1. Two components of the scheme are represented generically in the schematic below. They are

  1. The logic controlling the loading of the registers in the transmit domain and
  2. The detection logic on the control signals in the receive domain

A designer can use one of many techniques for implementing the generic components which can be considered as variables for design exploration.

The clock frequencies of the transmit and receive domains, specifically the ratio they imply and the relative reset release of the two clock domains can be considered as the System variables in this experiment.

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Lending a ‘Formal’ Hand to CDC Verification: A Case Study of Non-Intuitive Failure Signatures — Part 1

Thursday, June 13th, 2013

In Austin, at the 50th DAC earlier this month,  I delivered a poster presentation on “Lending a ‘Formal’ Hand to CDC Verification: A Case Study of Non-Intuitive Failure Signatures”.   In this first blog in a series, I will set the stage for the issues around the case study of failures in a common clock domain crossing synchronizer.

At DAC 2012 last year, we surveyed more than 300 participants to understand trends in the CDC verification space.  More than half had a new design project starting within 3 months, which indicates reduced design cycles.  Almost 1/3rd had over 50 clock domains in their design. Extrapolating from our DAC 2011 survey, we see a definite trend of increasing CDC complexity.  Almost 2/3rd had to incur the penalty of an ECO due to a CDC bug.

For the reasons above, CDC Analysis tools topped their shopping list.

As CDC verification is becoming mainstream, it is imperative to refine and fine tune the CDC flow to balance the verification effort. As indicated by the pie-chart on the bottom-right, ‘Automatic Formal’ is another technology that the industry is looking to leverage. In this presentation, we show how the application of formal analysis in the CDC space can be used by design engineers to verify their CDC constructs and how this can alleviate the CDC verification challenge from the shoulders of verification engineers.

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Photo Booth Blackmail!

Thursday, June 6th, 2013

Real Intent had a photo booth at its exhibit in Austin this week at the Design Automation Conference.  I thought it would be cool to give a photo souvenir of the 50th conference for anyone who strolled by.  On hand to work the booth were Julia and Antonio and they helped everyone enjoy themselves.

We had lots of fun hats, glasses, props, and feather boas for dress up.   Between Julia and myself we were able to get some great photos.  Here are just a few for your viewing pleasure.   And at the bottom of the page, you can click on the link to see blackmail photos for ARM, Synopsys, Cadence, Mentor Graphics, Breker, Oasys, Excellicon, Blue Pearl, LibTech, DeFacTo, Concept Eng, Tela, Oski Tech, Tanner, AMIQ, ClioSoft, Chip Path, Forte, Open Text, GlobalFoundries, Adapt IP, ThinkBold, Cayenne, and IBSystems (EDACafe).   Enjoy!


Feeling Good!

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