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 Decoding Formal

Posts Tagged ‘#52DAC’

Formal Ensures Tight Working Relationships

Wednesday, September 9th, 2015

Gabe Moretti of Chip Design used several points from Jin’s blog post below, in his recent article titled, “Design and Verification Need a Closer Relationship.” The article can be found at:

Today, verification engineers have a whole arsenal in their tool kit in order to combat hidden bugs in the design. Different verification techniques render different working relationship with the designers.

Formal verification is a white-box verification technique, which means formal engineers need to have a good understanding about the internals of the design in order to do effective formal verification. Therefore, formal engineers and RTL designers naturally have a much tighter working relationship than other disciplines.

First, a sound verification methodology should allow equal contribution from all effective techniques, which includes leveraging the exhaustiveness of formal to sign-off on design blocks that are harder to verify with simulation. The block partition between formal and simulation should be clean to simplify the effort on both ends. To achieve that, formal engineers should participate in the architectural planning and exploration stage of design development in order to help influence decisions regarding design partition and block interface. A well-partitioned design with a clean interface will make the decision on where to apply formal, as well as the actual formal verification tasks, much easier.


Decoding Formal @ DAC – Join Oski for Four Days of Formal Fun

Saturday, June 6th, 2015

Oski Decoding Formal Events are usually hosted at the Computer History Museum in Mountain View and have attracted lots of formal enthusiasts in the bay area. Deep formal talks from Oski, lectures given by formal experts from different companies, good networking, cool gifts and museum tours have become the signature of these events that formal engineers look forward to, every quarter.

To reach out to formal enthusiasts around the world and create a bigger event than usual, the 2015 Q2 Decoding Formal event will be hosted at DAC. Our theme is proving completeness of End-to-End Formal for Sign-off.


Preparing for Another Challenge at DAC: Break the Testbench!

Monday, May 18th, 2015

You may remember the Oski Technology Live Verification Challenge in 2012, where during the 72 hours of DAC, Oski verification engineer Chirag Agarwal formally verified a well-simulated design from NVIDIA, sight unseen, live and on camera, and found 4 corner case bugs. The challenge results exceeded everyone’s expectations, and inspired other companies to do more with formal in their verification flow. See the Live Oski Verification Challenge, and a blog recap and six-minute video, here.

The Impact of Great Teachers

Friday, May 1st, 2015

My daughter has been learning violin for the last 5 years with a wonderful Suzuki teacher. She emphasizes proper posture, beautiful tone and a good work ethic. This has built a solid foundation for my daughter to venture into learning other instruments. Last fall my daughter started playing flute for her school band, and viola at Young String Ensemble, the youngest division of Portland Youth Philharmonic, founded in 1929 as the first youth orchestra in the United States.

To help her prepare for the upcoming audition for the more advanced Portland Youth Conservatory Orchestra, we decided she would take some viola lessons with the Oregon Symphony Principal Violist. We were totally blown away after just one lesson.


DownStream: Solutions for Post Processing PCB Designs
S2C: FPGA Base prototyping- Download white paper

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