Dr. Jin Zhang
Jin Zhang has over 15 years of experience working in EDA, driving the effort of bringing new products and services to market. At Oski Technology, she is responsible for Oski’s overall marketing strategy as well as business development in Asia Pacific. Prior to that, she was the General Manager at … More »
September 18th, 2014 by Dr. Jin Zhang
You might still be skeptical of the idea that formal verification can be used by everyone. After all, there is a deep-rooted perception in the industry that formal verification is for the elite few formal experts with Ph.Ds.
This might have been true in the early days of formal technology. The formal tools’ capacity was limited and the use model was not mature. So the aid of someone who actually understood the algorithms “under the hood” was important to help the tool solve the tasks at hand.
However, things have changed dramatically in the last decade. Read the rest of Formal Verification, by Everyone and for Everyone
August 27th, 2014 by Dr. Jin Zhang
Brian Bailey’s recent article on “Fixing Functional Coverage” in Semiconductor Engineering (http://semiengineering.com/fixing-functional-coverage/) polled experts from different companies about the challenges of catching all the bugs, utilizing assertions and expanding coverage to the entire system. This blog elaborates on the four points we made in Brian’s article about how formal can help with functional coverage. Read the rest of Using Formal for Functional Coverage
August 13th, 2014 by Dr. Jin Zhang
The Hardware Model Checking Competition (HWMCC) was conceived at CAV (Computer-Aided Verification) 2006 and first launched at CAV 2007. The goals were to encourage technical advancement of model checking algorithms and thereby their deployment in the industry to promote formal adoption for hardware design verification. Read the rest of Sponsoring Technical Advancement in Formal Verification
June 19th, 2014 by Dr. Jin Zhang
This year at DAC, a question asked repeatedly got our attention: Do you offer advanced formal training program?
While we are not surprised by the request itself, the number, size, type and location of companies that asked about this was surprising. It included a wide spectrum of companies, from the U.S., Japan, Korea, China, along with large companies with established formal teams as well as small start-ups with no formal experience. Even EDA vendors asked if we could do training for them. Read the rest of Formal Training in High Demand
June 13th, 2014 by Dr. Jin Zhang
This year at DAC, we asked attendees to participate in a guessing game – make an educated guess about how long it takes to formally verify a design based on the given design description and statistics.
Here is a recap of the information provided to participants:
May 23rd, 2014 by Dr. Jin Zhang
Every year John Cooley publishes a DAC “must-see” list – a veritable treasure map of good stories. While this list has served DAC attendees in the past, in recent years it has continued to miss an important segment of the ecosystem: the growing number of service providers.
Oski Technology is one such service provider. In fact Oski is the only service provider in the formal verification space, and plays an important role in promoting formal adoption in the industry. Formal can improve verification efficiency and productivity, lead to reduced project cost and shorten time-to-market. Since 2005 we have partnered with many leading semiconductor companies to tape out mission-critical designs and build up their internal formal expertise. Read the rest of Cooley’s Report: Only Half The Story?
May 8th, 2014 by Dr. Jin Zhang
Enter to Win: 1-Week Formal Test Planning Session with Oski Technology
Formal test planning is the first step to ensuring successful End-to-End formal verification and formal sign-off.
There are 3 stages in the process of formal test planning – identifying the right design blocks for formal verification (the where question); estimating the formal verification effort using key metrics (the how much question); and planning the specific formal verification tasks on the chosen designs (the what question).
A good planning session can take several weeks to analyze the design, understand formal complexity hotspots, estimate the effort and craft a workable blueprint for formal verification. However we often see engineers jumping into the act of formal verification without spending enough time in formal test planning. Without proper formal test planning, it is not possible to achieve formal sign-off. Read the rest of Win:1-Week Formal Test Planning Session with Oski Technology
April 8th, 2014 by Dr. Jin Zhang
In our visits to many of our customers in the past year, we received a few common requests from companies both large and small:
March 20th, 2014 by Pippa Slayton
DVCon 2014 was a terrific show for Oski Technology. Not only were we proud to receive an “Honorable Mention” for (2nd) Best Paper at DVCon “Sign-off with Bounded Formal Verification Proofs”, we had the opportunity to have many meaningful conversations with existing customers and others new to formal verification and eager to learn more about what is possible with formal verification. Our DVCon “Sign-off” paper is available on the Oski Technology Web site. See our DVCon 2014 video here.
February 28th, 2014 by Pippa Slayton
The countdown to DVCON 2014 has begun! With more exhibitors and attendees than ever before, new programs and technical sessions, longer exhibit hours, DVCON 2014 is shaping up to be another outstanding event for the industry.
At Oski Technology, we are excited to offer many opportunities to connect with verification experts in the industry at DVCON – share ideas, discuss problems and solutions related to formal technology and formal sign-off methodology.
• Monday March 3rd 5:00 – 7:00pm, Oski will join the inaugural DVCON Booth Crawl and offer healthy stacks – nuts, veggie sticks and wine, while we enjoy great conversations. Come and chat at the Oski booth #305. Read the rest of Countdown to DVCON 2014