Dr. Jin Zhang
Jin Zhang has over 15 years of experience working in EDA, driving the effort of bringing new products and services to market. At Oski Technology, she is responsible for Oski’s overall marketing strategy as well as business development in Asia Pacific. Prior to that, she was the General Manager at … More »
Oski on the Bay in San Francisco
August 12th, 2015 by Dr. Jin Zhang
EDA’s verification market segment is not the only place where something’s named for the Cal (University of California, Berkeley) mascot Oski. A Blue and Gold Fleet boat named Oski sails out of Pier 39 in San Francisco and takes visitors around the Bay and Alcatraz.
When I saw the Oski pulling away from the pier, I couldn’t help but draw an analogy between Oski Technology’s mission and the choppy waters the boat was heading into on that sunny day. Sunny days and choppy waters are something verification engineers can face on a daily basis. Verification tasks are so challenging in today’s for system-on-chip (SoC) designs that verification alone takes more than 60% of the project cycle. What’s more, simulation alone for SoC designs will leave large holes for bugs to sneak through, all the way to silicon. The challenge of verification actually is more daunting than the choppy waters of San Francisco Bay.
Yes, the two Oski’s have different mission statements. The Blue and Gold Oski Fleet’s daily mission is to entertain guests with a mix of the history of San Francisco and the former jail sitting on Alcatraz Island. Oski Technology’s mission is to maximize the power of formal verification to enable innovative SoC design and Formal Sign-off. In the past 10 years, Oski has worked with countless project teams to use formal verification to overcome the verification challenges and together we toast to the success of their first silicon tapeout.
While the captain adroitly steers the Oski into the rough seas of the Bay, he has a clear plan and is on watch for kayakers, sea lions, catamaran sailing the Bay and other boats that may not be looking out for the Oski. Similarly, verification engineers need to create a solid plan to reach verification closure. The plan should include the best verification strategy to reach the verification targets, including, when and where to apply simulation versus formal on the chip to get the best verification return-on-investment (ROI).
Planning the sailing route and a formal verification strategy is all important for the task at hand. Scoping out the blocks that need formal testing is one of the first tasks of a formal verification services project. With the right targets, the project team can come up with detailed execution plans on formally verification the chosen blocks to achieve sign-off. Staying on course on the Bay can be the difference between smooth sailing or rough seas.
Formal verification has become a must-have technology in the verification flow. Implementing a sound formal verification strategy offers a project team many benefits, such as improving design quality, reducing project cycle and, hence, project cost. In particular, the ability to rely on formal exhaustiveness to cover all input scenarios so that corner-case bugs can be found is a sure step to lead to first silicon success.
A cruise around the Bay aboard the Blue and Gold Oski is a treat for anyone visiting San Francisco. Verification Engineers who embrace formal verification will think about the bugs they uncovered, allowing them time away from the rigors of SoC verification and may be a sail around Alcatraz Island on the Oski.