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Archive for March 21st, 2016

2016 DVCon San Jose Report

Monday, March 21st, 2016

2016DVCon_logo_WEBAs customary, the 2016 DVCon/San Jose was held at the DoubleTree Hotel. The dates this year were February 29-March 3.

Attended by approximately 1,200 visitors (about 700 paying customers and 400+ on the free day) and 30 exhibitors, its program included 12 tutorials, 13 technical papers and 45 posters. Topics were on various aspects of design and design verification, with particular emphasis on hardware emulation, Universal Verification Methodology (UVM), portable stimulus, low-power design, and formal.

The event offered a keynote, two panels, one roundtable and three sponsored lunches by each of the three main EDA giants. A conversation between Jim Hogan and Ajoy Bose titled “Crossing the Chasm: From technology to Valuable Enterprise,” was hosted by the EDA Consortium and based on Dr. Bose’s career in building several businesses in the high-tech industry.


S2C: FPGA Base prototyping- Download white paper

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