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Daniel Payne
Daniel Payne
Daniel Payne, a freelance EDA consultant since 2004 has served: Blue Pearl Software, Lattice Semiconductor, ON Semiconductor, Physware, OptNgn Software, Barcelona Design, YXI and OASIS Tooling. He has marketed EDA tools for Mentor Graphics, Viewlogic, Opmaxx, CrossCheck and Silicon Compilers. His … More »

My DAC Trip Report for 2010

June 17th, 2010 by Daniel Payne
  1. Photo tour on Sunday
  2. Enabling IR drop analysis for IC designs using a macro model for the power and ground network
  3. 3D field solver for IC designs uses a mesh technique
  4. Analog IC designs can be optimized and made portable
  5. Monte Carlo for SPICE and FastSPICE get faster and smarter
  6. SPICE and FastSPICE tools get faster
  7. SPICE, FastSPICE and rail analysis
  8. AMS users talk about success and issues with SPICE and FastSPICE
  9. Analog FastSPICE goes parallel
  10. A new way to do DRC using a windowed approach
  11. Variation aware IC design for 45nm and smaller
  12. 3D extraction for IC designs gives best accuracy
  13. Speeding ASIC designs with cells optimized on the fly
  14. OpenPDK or iPDK or both?
  15. SPICE and FastSPICE from Legend
  16. Another parallel SPICE simulator
  17. ESD integrity
  18. Coolest car
  19. How to draw a crowd

Anaheim Convention Center

Anaheim Convention Center

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