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 EDA Thoughts

Archive for February, 2010

Bye, Bye Gemini

Friday, February 19th, 2010

I’ve blogged about Gemini before:

In December 2009 I first heard that Gemini DA was in play by my Silicon Valley sources, then today we read in Cooley’s ESNUG that redirects to

Their tool was yet another Parallel FastSPICE circuit simulator.

Evidently it wasn’t selling enough or different enough from the other commercial tools being offered.

I love to see the little guy shake up the marketplace, although in this case it appears that Synopsys has acquired the technology with little fanfare.

Carbon Footprint is Good For ICs

Tuesday, February 16th, 2010

IBM just demonstrated graphene transistors that could become a replacement for pure silicon-based ICs.

Photo: Courtesy of IBM, posted at EE Times

The demonstration showed 100GHz operation at room temperature with a production goal of 1THz.

This is funded by DARPA the folks who really created the Internet.

We need to add Silicon-Carbide (SiC) to our vocabulary.

I’ll never forget the transition from NMOS technology to CMOS technology. When I was doing DRAM designs the performance was limited by the power dissipation on the chip and the ability of the ceramic or plastic packages to conduct heat away from the chip. Higher temperatures would slow down chip speeds.

CMOS came to the rescue and provided a much lower standby and switching power characteristics.

Today, we’re at a similar inflection point, hoping that something new will replace bulk CMOS transistors that will allow billions of transistors at a reasonable cost and run on batteries.

DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL

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