Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
February 14th, 2013 by Peggy Aycinena
After the euphoniously monikered IP provider, Uniquify, announced several weeks ago that the more whimsically monikered organization, Pixelworks, is using Uniquify’s DDR memory controller subsystem IP for multiple distinct processors that Pixelworks is, in turn, providing to TV makers who make 4Kx2K ultra high-def systems, one question still remained: How did Pixelworks know to use Uniquify’s offering?
According to a January 2013 article in IEEE Spectrum, knowing what IP to use in a project here in the 21st century is fairly easy knowledge to come by. I don’t know what planet the author of the op-ed piece, “Other People’s Knowledge”, lives on but it doesn’t seem to be the one that I hear about from the folks who make or buy third-party IP.
In fact, those people seem to indicate that knowing what IP to use in a particular project continues to be far more art than science. In particular, because until a system, or sub-system, is fully defined, modeled and simulated – let alone, manufactured and deployed in the field – one can never really know how a piece of IP is going to work in the environment into which it’s been placed.
February 7th, 2013 by Peggy Aycinena
Interesting news this week that Cadence will be acquiring Cosmic Circuits, interesting because Cosmic Circuits is “a provider of analog/mixed-signal IP cores in the 40nm and 28nm process nodes, with 20nm and FinFET development well underway.”
Great idea to keep expanding into IP for any EDA company, but does this move put Cadence in direct competition with its own customers? No problem, per the February 7th Press Release: “The addition of the Cosmic Circuits product line will broaden the Cadence IP portfolio, strengthening its solutions to address mobile device, cloud/datacenter and Internet of Things market opportunities.”
January 31st, 2013 by Peggy Aycinena
Not surprisingly, Silicon Valley based Kilopass Technology continues to advocate for non-volatile memory, in particular the company’s VCM [Vertical Cross-point Memory] bit-cell technology. In a recent phone call with Andre Hassan, Field Marketing and Applications Director at the company, we discussed why Kilopass see the future going their way.
WWJD: In 25 words or less, what is NVM?
Andre Hassan: Non Volatile Memory [NVM], at least the Kilopass version, is a one-time programmable standard CMOS process anti-fuse memory that maintains its contents through power down.
WWJD: When did volatile memory become King of the Hill?
Andre Hassan: With the introduction of SRAM and DRAM from companies like IBM and Intel in the late 1960’s.
WWJD: When will NVM mean just memory and not a special form of memory?
Andre Hassan: Actually it started out that way with magnetic core memory in the mid-1950s. Since then, the industry has tried to come back to it multiple times. It’s the holy grail that people have been chasing as long as I’ve been in the industry.
January 30th, 2013 by Peggy Aycinena
DesignCon’s unfolding in Silicon Valley all week. Among the many companies exhibiting there, IP provider CAST and its IP core development partner Beyond Semiconductor are enjoying a particularly excellent experience. When I stopped in at CAST’s booth on the DesignCon floor for a brief chat with company CEO Hal Barbour this afternoon, he told me his company’s revenue numbers for January 2013 alone are set to outpace CAST’s total first-quarter revenues from 2010, 2011, or 2012.
Given the energy and attendance swirling about us at DesignCon, Barbour’s impressive financials were not a complete surprise – Silicon Valley is back – but a revitalized revenue stream is not the only reason CAST is enjoying a lot of traffic in their booth this week. More it’s because CAST and Beyond Semiconductor have chosen this time and place to announce yet another member of their family of 32-bit processor cores targeting embedded applications.
January 24th, 2013 by Peggy Aycinena
Sometimes life gets away from you. You post a blog lamenting too little coverage of IP at DATE and DAC, receive in response a number of lively emails, and then sit on all of it because life’s gotten away from you. Among those emails is a telling note from the folks at IPextreme offering to send you some marketing materials they claim is relevant to your thesis about IP, EDA, and conference-coverage disconnects. You accept their offer, but because life is still getting away from you, when the big white envelope from IPextreme arrives, it sits in the InBox, ignored and unopened.
Finally the moment arrives when you can no longer allow life to get away. You open the envelope, examine the contents, stagger back in amazement, and after muttering omg several times, sit down to write this blog. Xena, IPextreme’s Warrior Princess, the Graphic Novel & Morality Play will be ignored no more. As you flip through the pages – all 36 of them – you take another sip of wine and wonder why other companies have been ignoring not just Xena, but all she represents.
January 10th, 2013 by Peggy Aycinena
EDAC’s January 7th MSS release details EDA/SIP earnings in Q3_2012, and attributes $423 million to SIP companies out of a total $1,620 billion for the combined industries. The same document cites EDA/SIP earnings in Q3_2011, and attributes $410 million to SIP companies out of a total $1,544 billion for the combined EDA/IP industries that EDAC represents.
In other words, and ironically, more than 25% of the revenues reported by the EDA Consortium’s Market Statistics Service are attributed to SIP companies, organizations who work in silicon intellectual property. And why is this ironic? Because if you thoroughly search both the DATE 2013 and DAC 2013 websites, you will find far less than 25% of the content there is dedicated to the topics of SIP, its development or utilization.
January 3rd, 2013 by Peggy Aycinena
For the first time ever, organizers of the International Electron Devices Meeting honored a member of their community by providing a platform for conversation about translating innovation into business success. The premier event on December 12th in San Francisco featured an hour-long, on-stage, lunch-time interview with Marvell Technology Group VP and GM of Communications and Consumer Business Weili Dai.
Ms. Dai co-founded Marvell in 1995 with her husband, Sehat Sutardja, and his brother, Pantas Sutardja. Together they have built an organization which now stands as the fifth largest fabless semiconductor company in the world, one with 7000 employees and an international clientele. If you wanted to know more about Marvell, the information’s out there in spades. If you wanted to know more about the personal story behind Marvell, however, you should have been at the IEDM Entrepreneurs Lunch on December 12th. Ms. Dai gave a compelling interview that day, providing as succinct a summary of what it takes to start and build a company as one could ever hope to hear.
The highlight was a description of how, with babe in arms, she was in the audience at the Greek Theater on the Berkeley campus watching her husband receive his PhD in EECS several decades ago. Now today, that child is himself a PhD candidate in the same school where his father earned a PhD and his mother a BS in Computer Science. Sehat Sutardja and Weili Dai have a younger son, as well, who is currently an undergraduate at Cal, also in the School of Engineering.
December 13th, 2012 by Peggy Aycinena
France-based Reflex CES [Custom Embedded Systems] announced this week what the company calls “the industry’s first release of the Reflex CES Aurora-like IP core based on Altera FPGAs. The core enables interoperability between Xilinx Virtex-6 LXT and Altera Stratix IV and Stratix V GX FPGAs.”
Sylvain Neveu, Reflex CES Co-founder and CEO, is quoted: “With our Reflex CES Aurora-like IP core, designers can easily migrate to new FPGA families with minimum risks, reuse their previous designs, and choose the best FPGA technology for their boards and systems using the Aurora protocol.”
So if that’s an Aurora-like IP core, what’s an Aurora IP core? The answer is, it’s from Xilinx:
December 6th, 2012 by Peggy Aycinena
Last month, Lou Covey posted comments regarding a blog posted here about Esencia Technologies, the company that received Software Best-in-Show at ARM TechCon. He took issue with my suggestion that it was unclear why Esencia received the award.
Covey’s comments prompted my phone call with Karl Kaiser, VP of Engineering at Esencia, who explained: “EScala is a design platform that takes a C algorithm for things like MP3 encoders, and creates an IP block for the design – a reprogrammable core for the target architecture. EScala allows you to generate a core that fits your algorithm.
“At Esencia, we have provided a lot of ASIC design services and wanted to find a way to simplify the traditional RTL flow – architecting, partitioning, implementing, and writing the testbench. EScala is a result of that effort and is unlike anything else on the market.
November 29th, 2012 by Peggy Aycinena
In a move to catch up with industry coverage of CEVA’s unsolicited offer to buy MIPS Technologies, I turned to Yahoo Financials to find out what was going on. What I quickly discovered in looking at Yahoo was that the CEVA/MIPS story has gotten ugly.
I’m among many who have been interested in MIPS over the years for several reasons: a) MIPS used to be on the EDAC Board of Directors in the person of then-MIPS President & CEO John Bourgoin, and b) MIPS was founded by Stanford President John Hennessy.
Now, however, per the Press Release posted on November 28th: “Levi & Korsinsky is investigating the Board of Directors of MIPS Technologies, Inc. for possible breaches of fiduciary duty and other violations of state law in connection with the sale of the Company to Imagination Technologies Group PLC and the sale of the Company’s patents to Allied Security Trust (“AST”).