Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
April 14th, 2016 by Peggy Aycinena
I would argue that a lot of the content that’s sitting in the IP Track at DAC is really just about design, and not specifically about IP-based design. To prove that point, below is a complete listing of the sessions in the IP Track that’s set to air between June 6th and 9th at DAC in Austin. Those that are legitimately about IP are bolded, sessions that actually talk about using IP. Those not bolded are ‘just’ about design, or are merely high-level nattering about superficial issues associated with IP reuse.
Conclusion: the number of IP-related sessions are far fewer than one would hope. If IP is this important, why aren’t there more sessions that are really about IP? Is there a conspiracy here?
Fortunately, this next week I’m talking at length with Warren Savage. As CEO of IPextreme, his knowledge about the technology and business of IP is pretty encyclopedic. I will run my conspiracy theory past him: DAC wants you to believe they believe in IP, but in fact the conference is still more about design automation, not about using silicon IP to enhance the process. EDA vendors still rule the roost at DAC.
April 7th, 2016 by Peggy Aycinena
“This tool is definitely needed by designers,” Dave said, “and is motivated by the increasing use of FinFET devices. Here at Synopsys we have 1300 engineers in our IP team, with lots of these people turning to FinFETs in their design.”
Not an easy transition, he noted: “A single transistor exists in a planer mode, but it becomes a much more complex device in a FinFET. The layout becomes more complex, and so does the approach to design.”
There have been some developments with respect to custom design, Dave acknowledged: “Most recently, you could actually automate your layout with constraints. However, typing in those constraints is so time-consuming.
“With Custom Compiler, we have moved instead to a visually constrained layout, which allows you to re-apply what you’ve already done – both to your current work and to your future work as well.
March 24th, 2016 by Peggy Aycinena
Here’s the quote from Rhines included in EDAC’s press release discussing their Market Statistics Service report for Q4_2015:
“After 23 consecutive quarters of growth, the EDA Industry revenues declined slightly in the fourth quarter, compared to a particularly strong Q4 2014. However, industry revenue increased 5 percent for calendar 2015 compared to 2014, and the semiconductor IP and services categories increased in Q4. Geographically, the Asia Pacific region continues to grow, while other regions saw modest declines this quarter.”
March 9th, 2016 by Peggy Aycinena
Lots of people have been pointing out for a long time that membership in the EDA Consortium includes some of the biggest names in IP, not to mention embedded software, so not reflecting that reality in the organization’s name is pretty nonsensical. In fact, two recent blogs here on EDACafe specifically address the issue.
The first one is titled: “Answer’s nope: Should EDA Consortium become IP Consortium?” [September 30, 2015].
In this blog, I asked Mentor Graphics CEO Wally Rhines: “Aren’t the IP companies on the verge of overshadowing the size and impact of the EDA companies in the EDA Consortium. So much so, it seems like it’s time to change the name to the IP Consortium.”
Rhines responded, “It will never be the case that it’s all EDA or all IP. In fact, IP revenue is only one-third the size of the market tracked by MSS today. The other two-thirds is traditional EDA.
“Even ARM — although their market cap is $20 billion — their revenue is just about the same as Mentor’s. The EDA industry is a long way from being dominated by the IP industry, plus we’re in a very prosperous period in EDA. We’ve got 22 nanometers, 14, 10, 7 all working at the same time, so we’re meeting customer demands at all of these nodes.”
Last September, Dr. Rhines appeared distinctly underwhelmed by the argument that it’s time to change the Consortium’s name.
February 25th, 2016 by Peggy Aycinena
* Veloce Deterministic ICE: Designed to overcome unpredictability in ICE environments by adding 100-percent visibility and repeatability for debug; provides access to other ‘virtual-based’ use models.
* Veloce DFT: Designed to accelerate DFT verification prior to tape-out to minimize the risk of catastrophic failure; significantly reduces run times when verifying designs after DFT insertion.
* Veloce FastPath: Designed to optimize emulation performance when verifying large multi-clock SoC designs by enabling faster model execution speed.
February 18th, 2016 by Peggy Aycinena
More importantly, of course, Rizzatti helped guide EVE, the high-flying European EDA company that led the field in emulation from their base in France before being acquired by Synopsys in 2012. I spoke with Rizzatti this week about emulation, his talk at DVCon, and his recent endeavors writing about a technology that’s taking the world of verification by storm.
He started by establishing the importance of emulation today: “This technology is here to stay. It’s been around for 30 years, and [historically] was something only the big companies could afford to buy and use. They needed an army of engineers. Today it’s no longer a niche technology, however; it’s mainstream.”
January 27th, 2016 by Peggy Aycinena
Authored by SemiWiki’s Dan Nenni and Don Dingee, the book “delivers an informative look at events and technology that powered the mobile device industry to worldwide adoption.”
When I spoke with Dingee by phone this week, he said the book represents an enormous amount of work: “Sixteen months of intense research, 270 pages and over 800 footnotes.”
Other books have been written about ARM, he acknowledged, but this one is different: “People ask if this is a technology book or the story of ARM and I say, in truth it’s a little bit of both.”
January 7th, 2016 by Peggy Aycinena
“However, the biggest companies would like to see something closer to steady growth. Volatility is not as good for the bigger companies as it is for the smaller companies.”
If you ask: “But how viable is a high-tech industry when there’s no increase expected in VC funding for the foreseeable future?”
Rhines replies: “Yes, it’s true. VC funding in EDA has declined over the last 10 years, with the money often going instead into social networking. There is still ongoing investment today in EDA, however, but it’s angel funding, not VC funding.”
December 17th, 2015 by Peggy Aycinena
The calendar year draws to a close, but not the momentum of technology as evidenced by the roadmap of conferences set to unfold over the next several months. There are so many opportunities to network, learn, and develop sales leads.
* CES2016: Consumer Electronics Show – January 4-9 – Las Vegas
No one need tell you what CES encompasses: Simply everything. The 2016 edition includes keynotes from the CEOs of Intel, VW, CTA, Netflix, GM, IBM, and execs from Samsung, NBCUniversal, and YouTube. The future is always showcased at CES.
November 18th, 2015 by Peggy Aycinena
The fact that the company needs to make this announcement is indicative of a new attitude towards an old problem: Software companies who lose their products to theft and piracy no longer want to just buck up and get past it, particularly in EDA. Instead, they want tools and strategies to go after their adversaries. The newly launched startup SmartFlow Compliance Solutions, just announced last week, is planning to offer such tools.
Launched by Ted Miracco – one of the founders of EDA vendor AWR Corp. – SmartFlow is based on his experience dealing with pirated AWR product software, including tracking down and forcing restitution from companies who were proven culpable. In a phone call last week discussing his new company, Miracco said pirated software is more than just an occasional nuisance, it’s resulting in billions of dollars in lost revenue to the companies whose products are being used without licenses.
More profound than lost profits, however, is the ’tilting’ of the playing field. When companies who use pirated software to design chips or systems are able to undercut their competition by underpaying for the tools they need, or by not paying at all, the competition is hobbled.
In response, SmartFlow has engineered a complex set of tools and protocols that will allow companies to unearth pirated instantiations of their software across a variety of customer profiles. To begin their effort to build those tools, Miracco and his team looked closely at software non-compliance around the globe, parsed the different types of pirates and examined their principal strategies.