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Posts Tagged ‘Warren Savage’

IP Theft: Cheaters & Chuckles vs. Chalk & Cheese

Thursday, September 15th, 2016


Synopsys has a problem.
Per Norm Kelly, speaking at the ESD Alliance panel on September 14th in Silicon Valley, Synopsys loses fully a third of the revenue they’re owed each year for their vast catalog of IP because it’s stolen by Cheaters and used without paying any licensing or royalty fees.

Kelly said Synopsys earns about $200 million per year selling IP, and loses another $100 million to theft. Cheaters are a real problem, he lamented, and as Director of License Compliance for Synopsys he should know. Kelly did not have the floor to share these laments, however, until Warren Savage, GM of IP at Silvaco, opened the meeting.

Speaking from the podium as moderator of the evening’s discussion, Savage said the real problem is the bumblers, those designers and companies who lose track of licensing obligations for IP that was either purchased some time ago, or was brought into the design effort on a data stick fished out of the pocket of someone who’s joined the organization through a poorly managed M&A.

In other words, when Chuckles the Clown uses IP, often as not he doesn’t realize some monies are owed to the third-party IP vendor who created it in the first place. Savage offered this statistic: On an average SoC today, there are 150 to 200 blocks of IP, but only a small percentage of those blocks are actually paid for.


ESD Alliance: New members bring opportunities, concerns

Thursday, September 8th, 2016


Over the last several weeks, the ESD Alliance has announced
two more members, news of particular interest because both companies are IP vendors. C-Sky Microsystems provides 32-bit embedded CPU cores, and Silvaco provides EDA tools for development of analog/mixed-signal devices, power IC and memory design.

True, Silvaco doesn’t sound like an IP vendor until you remember that it just acquired IPextreme, a well-known player in the IP market headed up by Warren Savage. And Savage, now GM of Silvaco’s IP Division, has recently been named chair of the ESD Alliance Semiconductor IP Working Group, tasked with developing a common methodology, best practices for fingerprinting, and solutions for tracking and auditing IP.

Meanwhile, C-Sky Microsystems brings its own unique value proposition to ESD Alliance. Described in the Press Release as “the first IP company from China to join the ESD Alliance,” C-Sky says it intends to actively participate in Savages’ SIP Working Group. This second bit is admirable, but the first could prove complicated.


IP Panel: What keeps you awake at night?

Thursday, August 11th, 2016


It’s fantastic to see that the ESD Alliance is following through
with its new-found commitment to promote discussion about the IP industry. On Wednesday, September 14th, the Alliance is hosting an evening panel at their headquarters in Santa Clara to discuss semiconductor IP issues that “Keep You Awake at Night”.

As background, consider that the massive amounts of IP involved in building a modern SoC may translate into IP vendors losing millions of dollars if their IP is used therein without proper licensing. At the same time, semiconductor companies also wrestle with troubling issues if their engineers accidentally reuse a core without proper licensing, possibly exposing their employers to huge liabilities. The ESD Alliance event in September promises to address these thorny problems.

Moderated by industry leader Warren Savage – formerly CEO of IPextreme, but now GM of IP at Silvaco with the acquisition announced just prior to DAC – the evening’s two panelists come from interesting backgrounds.


Reaction to ARM’s Deal: W.Savage, D.Kelf, H.Barbour

Thursday, July 21st, 2016


Who better qualified to post reactions to this week’s astonishing news
out of Tokyo and Cambridge – SoftBank is buying ARM in an all-cash deal for 24.3 billion British pounds – than the leaders of two highly regarded IP companies and an articulate Brit with total street cred in EDA.


Lanza Panel at DAC: Democratization is not Open Source

Thursday, July 14th, 2016


Long-time EDA investor Lucio Lanza lead a fascinating, albeit mystifying, discussion
in the DAC Pavilion on Monday, July 6th, in Austin. His panelists included IPextreme’s Warren Savage, Scientific Ventures’ Mark Templeton, and eFabless’ Michael Wishart, with the topic under discussion being open source.

The session was titled “Daring to Move to Open Source” and was described thusly: “The emerging Internet of Things market is destined to upend that time-tested ‘advanced-node’ model, as developers opt for older, less costly process technologies, using commodity design tools and selecting proven IP blocks to quickly and efficiently assemble chips. As demand for IoT devices grows exponentially, might open source EDA tools and IP become viable, or even the winning combination that enables the low-cost design of an IoT SoC?”

Here are some soundbites from the panelists.


Mac on DAC: IP is critical, and so is everything else

Thursday, May 12th, 2016


IP will be well represented at DAC
 according to Adapt IP Michael “Mac” McNamara, and he should know. He’s helped build the IP Track at the show and is concerned that everyone understand the IP-related content in Austin this year will be deep and wide.

Mac and I spoke by phone recently. He’d read a blog a posted here in April expressing skepticism about IP coverage at DAC. Therein, I suggested the content set for Austin in June was inadequate, given the important role IP plays in chip design today.

A thoughtful McNamara wanted to respond to this critique; he wanted to evangelize for the quality of the content at DAC – particularly as he is Vice Chair of the conference this year and will be General Chair in 2017. [Cadence’s Chuck Alpert is General Chair here in 2016.]


Warren Savage: Optimism for IP at DAC and beyond

Thursday, May 5th, 2016


Warren Savage, CEO at IPextreme, is willing to address questions regarding IP content at DAC 2016
, enthusiastic in fact. That’s not surprising, given that he serves on the IP Track Committee that reviews the content.

“I think the content’s very good this year,” Savage said in a recent phone call. “We’ve been working on the IP content at the DAC for 3 years, and continue to make progress. I would say the biggest thing [we struggle with] is insufficient time allocated for IP.

“In comparison to previous years, however, the IP and Design tracks have been merged and all put under the same track – something we recommended against, because design-related submissions generally are different from IP-related submissions.”


Fingerprinting IP: IPextreme’s Motive, Means, Opportunity

Thursday, October 15th, 2015


There’s a term for engineering solutions that are simple, necessary and sufficient.
The term is elegant. And that’s the term that must be applied to the latest announcement out of IPextreme.

The company has come up with a simple, elegant process whereby IP blocks can be assigned a fingerprint, an unalterable bit of code that can be attached to the block and stays with it as that IP passes along into a chip design. The fingerprint then allows that IP to be detected, using IPextreme’s DNA analysis tool, by everyone involved with that chip going forward. Where everyone includes not just the engineers, but the lawyers and accountants in semiconductor companies who need to verify that a particular IP block in a commercial design has been legally procured and paid for.

Because, ultimately IPextreme’s fingerprinting scheme is about above-board licensing of IP, and guaranteeing legitimate revenue for the companies that make third-party IP and design reuse a reality. It’s that simple and elegant.


IP @ DAC: Design reuse still not for faint of heart

Thursday, April 16th, 2015


Building on last year’s success, the 2015 Design Automation Conference in San Francisco is offering even more substantial content in the track centered on silicon IP and design reuse. Reading through the list of topics, speakers, and companies set to be featured across a diverse set of sessions from June 7-9 at Moscone Center, two things are obvious.

One, a lot of work has been done to assemble all of this. And two, it’s possible the thorny issues surrounding IP reuse may never go away: integration, verifying quality, convincing staff to use design blocks that originate outside of the group, and dealing with the massive amounts of data that IP selection and reuse generates.


Mystery House: Constellations IP unlock hidden secrets

Thursday, September 18th, 2014


Tuesday October 14th is coming up fast, and if you’re not yet signed up for the Constellations IP day-long event at San Jose’s Winchester Mystery House, you risk missing the chance to meet the ghost of Sarah Winchester. However if you are signed up for the event, thanks to IPextreme you’re going to have a fascinating and eerie time.

As all locals know, Sarah Winchester inherited tens of millions when her husband William Winchester died in 1881. He had founded the rifle company of the same name, and what with the Civil War and the Wild West proving massive markets to sell into, the fortune was vast when he died. By 1884, Sarah had run from New England to San Jose carrying her millions, and had begun to build and build and build her proto-Victorian wedding cake of a clapboard house. By the time she died almost 40 years later, the house had 40 bedrooms, multiple staircases that lead to nowhere, 47 fireplaces, almost 20 chimneys, and two ballrooms.

So you can understand why a tour of the Winchester Mystery House more than warrants signing up to attend the Constellations IP event. The tours will be interlaced with the technical program, and the whole thing will last from 8:30 am to 6:00 pm, including breakfast, lunch, an end-of day reception and a series of substantive talks from folks like IPextreme CEO Warren Savage, Semico President Jim Feldhan, Adapt IP CEO Mac McNamara, JB Systems President John Blyler, IPextreme SVP/GM Kands Manickam, Sonics VP Randy Smith, Extension Media’s Gabe Moretti, and Certus Co-Director Stephen Fairbanks.


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