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Posts Tagged ‘UVM’

Celebrating Accellera’s UVM: Now it’s IEEE 1800.2

Thursday, April 27th, 2017

 


Tom Alsop and the team at Accellera are elated
: The UVM standard has been accepted by the IEEE as 1800.2 and congratulations are certainly in order.

The effort has consumed upwards of 10 years, and represents thousands of man-hours of effort, consultation, compromise, consensus building, rinse and repeat. Over and over until the final product was polished, presented and approved by the IEEE. Not an easy process by anybody’s estimation.

When we spoke by phone this week about the Accellera announcement, I asked Tom Alsop [Principal Engineer at Intel] how difficult the whole thing had actually been.

He chuckled slightly: “For us, it was fairly difficult.”

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Life is Short: Carpe Eruditio at DAC 2016

Thursday, May 26th, 2016

 


There are clearly a lot of collateral distractions at the Design Automation Conference
: Networking. Social Hours. Parties. Chotzkies. But the real fun at DAC comes from carving time out to attend technical sessions. This is year in Austin, the offerings are particularly rich.

On Sunday, June 5th, my two favorites are: The Workshop on Design Automation for Cyber-Physical Systems, and The Workshop on Computing in Heterogeneous, Autonomous ‘N’ Goal-Oriented Environments. Both of these all-day events feature experts from academia and industry, most speaking for at least 30 minutes. The topics will be very technical and the schedules allow for detailed presentations. Of course, this doesn’t mean the other workshops on Sunday don’t have great merit, but the two I have identified look to be particularly rich opportunities for learning.

Sunday evening, for the first time, there will also be a 2-hour panel focused on Career Perspectives in EDA, a discussion sponsored by CEDA. Although many will be obliged to attend networking dinners on Sunday evening, or will still be busy setting up booths for Monday morning’s Exhibit Hall opening, attending this Career Panel seems an opportunity not to be missed, particularly as it will be moderated by the supremely knowledgeable Bill Joyner from SRC. Admittedly, this is not a technical session, but the implications for the industry are profound. [File under the heading: ‘Concern for an Aging Industry’]

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S2C: FPGA Base prototyping- Download white paper



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