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Posts Tagged ‘Synopsys Reference Implementations’

ARM & SNPS: implementing big.LITTLE

Thursday, March 21st, 2013

 

If you thought about going to the Synopsys Users Group meeting next week in Silicon Valley, there’s at least one topic that would make it worth your time: This week ARM and Synopsys announced “optimized 28-nm Synopsys Reference Implementations for ARM Cortex-A15 MPCore and Cortex-A7 MPCore processor clusters, as well as the CoreLink CCI-400 cache-coherent interconnect.”

The reference implementations are currently available, and include “scripts, floorplan, constraints and documentation” – scripts that are built on Synopsys’ tool Reference Methodologies and are optimized for high-performance cores. Clearly attending SNUG would clarify what you need to know to use all of this, but first apparently you need to understand ARM’s big.LITTLE processing. Which is what?

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