Posts Tagged ‘Synopsys’
Thursday, October 13th, 2016
Next week, DVCon is once again in Europe, October 19-20 in Munich. A marvelous agenda has been laid out for this year’s 2-day conference, including three keynoters that pretty much sum up the state of things in the industry here in 2016. If you want to know where to apply your resources – both human and material – over the next decade, look no farther than these three talks.
It’s a tiring trip from Silicon Valley to Bavaria, but the quality of these presentations, combined with the rest of the content at DVCon Europe, will make the trip well worth the effort. Hope you’re going.
Thursday, September 22nd, 2016
Geoff Tate, founding CEO at Rambus, is busy – again. These days he’s leading the charge with a new FPGA-based enterprise that, per Tate, wants to be “the first to the party” – a party that’s all about providing FGPA-based IP to a market increasingly in need of these products.
When Tate and I spoke by phone recently, he offered the Flex Logix elevator pitch, and then focused on the company’s August press release.
“We are like the ARM of FPGA,” Tate said, and then laughed. “No, we are not expecting to be acquired by SoftBank anytime soon.”
“However, ARM was the first to successfully embed processors,” he said, “and at Flex Logic we are [doing that] with FPGAs.”
Thursday, September 15th, 2016
Synopsys has a problem. Per Norm Kelly, speaking at the ESD Alliance panel on September 14th in Silicon Valley, Synopsys loses fully a third of the revenue they’re owed each year for their vast catalog of IP because it’s stolen by Cheaters and used without paying any licensing or royalty fees.
Kelly said Synopsys earns about $200 million per year selling IP, and loses another $100 million to theft. Cheaters are a real problem, he lamented, and as Director of License Compliance for Synopsys he should know. Kelly did not have the floor to share these laments, however, until Warren Savage, GM of IP at Silvaco, opened the meeting.
Speaking from the podium as moderator of the evening’s discussion, Savage said the real problem is the bumblers, those designers and companies who lose track of licensing obligations for IP that was either purchased some time ago, or was brought into the design effort on a data stick fished out of the pocket of someone who’s joined the organization through a poorly managed M&A.
In other words, when Chuckles the Clown uses IP, often as not he doesn’t realize some monies are owed to the third-party IP vendor who created it in the first place. Savage offered this statistic: On an average SoC today, there are 150 to 200 blocks of IP, but only a small percentage of those blocks are actually paid for.
Thursday, May 12th, 2016
IP will be well represented at DAC according to Adapt IP Michael “Mac” McNamara, and he should know. He’s helped build the IP Track at the show and is concerned that everyone understand the IP-related content in Austin this year will be deep and wide.
Mac and I spoke by phone recently. He’d read a blog a posted here in April expressing skepticism about IP coverage at DAC. Therein, I suggested the content set for Austin in June was inadequate, given the important role IP plays in chip design today.
A thoughtful McNamara wanted to respond to this critique; he wanted to evangelize for the quality of the content at DAC – particularly as he is Vice Chair of the conference this year and will be General Chair in 2017. [Cadence’s Chuck Alpert is General Chair here in 2016.]
Thursday, April 7th, 2016
Synopsys Marketing Director and long-time EDA contributor Dave Reed talked recently about the company’s new, highly anticipated product release, Custom Compiler.
“This tool is definitely needed by designers,” Dave said, “and is motivated by the increasing use of FinFET devices. Here at Synopsys we have 1300 engineers in our IP team, with lots of these people turning to FinFETs in their design.”
Not an easy transition, he noted: “A single transistor exists in a planer mode, but it becomes a much more complex device in a FinFET. The layout becomes more complex, and so does the approach to design.”
There have been some developments with respect to custom design, Dave acknowledged: “Most recently, you could actually automate your layout with constraints. However, typing in those constraints is so time-consuming.
“With Custom Compiler, we have moved instead to a visually constrained layout, which allows you to re-apply what you’ve already done – both to your current work and to your future work as well.
Thursday, February 18th, 2016
The folks at DVCon have done a brilliant thing. They’ve invited Lauro Rizzatti to present at their upcoming conference on a topic that Rizzatti knows better than anybody, emulation. Last year alone, he wrote 40 articles on the subject.
More importantly, of course, Rizzatti helped guide EVE, the high-flying European EDA company that led the field in emulation from their base in France before being acquired by Synopsys in 2012. I spoke with Rizzatti this week about emulation, his talk at DVCon, and his recent endeavors writing about a technology that’s taking the world of verification by storm.
He started by establishing the importance of emulation today: “This technology is here to stay. It’s been around for 30 years, and [historically] was something only the big companies could afford to buy and use. They needed an army of engineers. Today it’s no longer a niche technology, however; it’s mainstream.”
Wednesday, November 18th, 2015
This week Synopsys announced “unauthorized third-party access to Synopsys EDA, IP and optical products and product license files through its customer-facing license and product delivery system. The unauthorized access, which began in July 2015, was discovered by Synopsys in October 2015.”
The fact that the company needs to make this announcement is indicative of a new attitude towards an old problem: Software companies who lose their products to theft and piracy no longer want to just buck up and get past it, particularly in EDA. Instead, they want tools and strategies to go after their adversaries. The newly launched startup SmartFlow Compliance Solutions, just announced last week, is planning to offer such tools.
Launched by Ted Miracco – one of the founders of EDA vendor AWR Corp. – SmartFlow is based on his experience dealing with pirated AWR product software, including tracking down and forcing restitution from companies who were proven culpable. In a phone call last week discussing his new company, Miracco said pirated software is more than just an occasional nuisance, it’s resulting in billions of dollars in lost revenue to the companies whose products are being used without licenses.
More profound than lost profits, however, is the ’tilting’ of the playing field. When companies who use pirated software to design chips or systems are able to undercut their competition by underpaying for the tools they need, or by not paying at all, the competition is hobbled.
In response, SmartFlow has engineered a complex set of tools and protocols that will allow companies to unearth pirated instantiations of their software across a variety of customer profiles. To begin their effort to build those tools, Miracco and his team looked closely at software non-compliance around the globe, parsed the different types of pirates and examined their principal strategies.
Wednesday, September 9th, 2015
ARM must be doing something right when among the eight corporate sponsors for their upcoming Silicon Valley users conference in November, the top three companies in EDA are listed as Diamond or Platinum.
Cadence is Diamond, undoubtedly, because company President & CEO Lip-Bu Tan is co-chair of EDAC, and ARM CEO Simon Segars is on the EDAC Board. But why would Mentor and Synposys spend good money being Platinum sponsors of ARM’s show when they could put that particular chunk of disposable income into their own user conferences, or even DAC? Particularly since Mentor and Synopsys sell IP, as does Cadence, so in some ways the three EDA companies may actually be competing with ARM.
There are three possible answers: A) Mentor, Synopsys, and Cadence serve as channels for ARM products. B) Mentor, Synopsys, and Cadence want to see, and be seen by, ARM’s enormous worldwide customer base. C) ARM has the winning hand in today’s semiconductor supply chain, so either the Big Three in EDA pony up to help sponsor ARM TechCon, or the UK-based IP behemoth won’t cooperate in the EDA world; they won’t offer pointers or tool-development advice for the third-party design software that EDA vendors sell and ARM customers [might] buy.
Wednesday, August 12th, 2015
Autumn used to start in September, but now classes and conferences commence in August and vacation ends just that much sooner. Here’s a list of various events you should consider attending between now and the end of the year, with thanks to conference organizers for the associated descriptions.
Scanning the range of topics, it’s clear the combined IP and EDA industries have an increasingly broad range of interests: IoT, autos, wearables, software security, verifying/integrating IP, power, device physics, memory, embedded processors and software, sensors, MEMS, a range of standards, networking, both the professional and technical kinds, and “synergistic collaborative design” both up in the cloud and down below on solid ground.