Posts Tagged ‘Sonics’
Thursday, December 7th, 2017
This week on Thursday, December 14th, the second annual edition of REUSE 2017 will unfold in Silicon Valley. It’s a gathering crafted specifically for the vendors of IP blocks, and now whole sub-systems, those pieces of the puzzle which allow the vendors’ customers to design and produce electronic products more efficiently and with better results.
It goes without saying that IP is a pivotal part of the semiconductor supply chain today. Organizations like Arm and Synopsys reap huge benefits from being among the principal suppliers of that IP. But there are hundreds of IP companies in the world – big, medium, and small – that also provide IP.
Potentially, they could all be participating in something like Reuse 2017. Arm, for instance, is participating in the conference, along with dozens of smaller companies. Synopsys, however, is not.
Thursday, November 30th, 2017
San Jose-based Sonics is a long-established IP vendor specializing in On-chip Networks [NoC] and Energy Processing Units [EPU]. Co-founded by CEO Grant Pierce and CTO Drew Wingard, the company has 150 parents and has “supported customer products that have shipped more than 4 billion SoCs.”
Currently Grant Pierce is an exceptionally busy man. Not only is he leading Sonics, he’s also serving as Chair of the ESD Alliance. It’s a fortunate circumstance to have Pierce leading the Alliance; his point of view is exactly what’s needed to help shape what was originally an EDA-focused organization into something that embraces the full set of constituencies driving electronic system design today. Pierce is strongly committed to new technologies and the small companies that drive the innovation.
Pierce and I spoke by phone in late November. He is clearly very enthused about the company and the ESD Alliance.
Thursday, June 1st, 2017
This is the third in a four-part series showcasing Grand Challenges in IP. The first two conversations were with Sonics CEO Grant Pierce, and CAST Board Chair Hal Barbour.
This week’s dialog is with Warren Savage, founder and CEO of IPextreme. The company was purchased by Silvaco in 2016, where Savage now serves as GM of the IP division.
Warren Savage has been an energetic leader in the IP community, working to get companies in the industry to link arms, address common concerns, and give greater visibility to the importance of their products in the global semiconductor supply chain.
When we spoke on May 24th, Savage began by addressing my question about protection for IP blocks as they move down the manufacturing chain
Thursday, May 18th, 2017
Here begins the first of four dialogs about Grand Challenges in IP. This first installment is a conversation with Sonics co-Founder and CEO Grant Pierce, who also currently serves as Chair of the ESD Alliance. We spoke by phone earlier this week.
Asked to enumerate the Grand Challenges in IP he sees today, Pierce began: “Having been in the industry for 20 years myself, I am surprised that we still have some challenges ahead of us. We have new entrants into the industry that are more focused at the system level, however, with customers coming in to interact with the IP guys directly to get their custom designs done.
“What I am seeing today, versus 20 years ago, is the emergence of Machine Learning. And that brings with it some technical challenges. On the one hand, they are very familiar – the age-old challenges about bandwidth and throughput – but on the other hand, they are also very new. Today’s applications are driving things together in a totally new way.
Thursday, February 9th, 2017
This week, the ESD Alliance announced that Sonics CEO Grant Pierce has been elected chair of the organization’s Board of Directors. His election is unique in several ways: Pierce is the first CEO of an IP company to lead the Alliance; he replaces two co-chairs, Cadence CEO Lip-Bu Tan and PDF Solutions, John Kibarian; and he is only the second CEO of a non-publicly traded company to serve as Board Chair, the other being Jasper CEO Kathryn Kranen who took the reins in 2012.
When Pierce and I spoke by phone on Tuesday about his election, he noted the unique circumstances of his new leadership role: “When I joined the board several years ago, it was with the intention to add a new point of view to what was then the EDA Consortium, to help the organization reflect the emerging reality of what was happening in the marketplace with respect to IP companies.
“In some ways, the IP companies consider themselves to be a necessary evil. Every chip developed today involves some sort of third-party IP, so having a place on the Board of the ESD Alliance is essential.”
Wednesday, June 24th, 2015
These last several months have been busy for Sonics: Release of the latest edition of the company’s “flagship” NoC, SonicsGN 3.0, featuring Sonics’ interleaved multi-channel technology; Release of Version 8.0 of SonicsStudio, the company’s SoC development environment with “improvements for designer productivity and power analysis”; Announcement of Sonics’ ICE-Grain Power Architecture, “a complete power management sub-system comprised of configurable hardware IP blocks, embedded control software, and integrated design tool environment”.
Of the three announcements, the last is the most profound, offering a better, smarter technique for building power management into systems that include Sonics IP. Power is of great concern to anyone working in silicon today, and of even greater concern to those whose business model includes selling both IP and services to the industry.
Drew Wingard, distinguished co-founder & CEO of Sonics, is one of those concerned, articulating the situation in detail on Monday, June 8th, at DAC where he addressed an SRO audience of 150+ technologists anxious to learn more about low power IP. Proving himself one of Sonics’ true Dark Silicon Knights, the following is a snapshot of Wingard’s comments.
Thursday, November 20th, 2014
Randy Smith bring a lot of humanity to his role as Vice President of Marketing at Sonics, and a lot of frequent flier miles. The day after we spoke by phone last week, he was set to fly to Japan for a week on business. When I asked if Japan was a new destination for him, he laughed.
“I’ve been to Japan over 150 times,” he said, “and because of that, I have lifelong business relationships there, having worked closely with customers, EDA vendors, design services and IP providers. That’s why my business card used to say ‘Randysan Marketing’. I always look forward to going to Japan, because it gives me the opportunity to touch bases with customers there and to [reconnect] with colleagues.”
Thursday, October 2nd, 2014
This blog requires a long, tall cup of coffee: Go get one, put your feet up, and plow on through. ARM TechCon 2014 took place this week at the Santa Clara Convention Center, and as an indication of what the industry feels is important right now, the following is a complex snapshot of press releases issued by various TechCon exhibitors highlighting their progress in the days leading up to and including the show. Listed first are the three main ARM press releases, then the other exhibitors are showcased.
By the way, the answer to what the industry thinks is important today? If the following is any indication, it’s IoT all the way down, with a dollop of FinFET and low-power thrown in for good measure. And if you don’t know IoT means Internet of Things, you haven’t been listening – particularly as Freescale says in their Press Release: “Analyst research firm Gartner estimates that the IoT will include 26 billion units installed by 2020, and by that time, IoT product and service suppliers will generate incremental revenue exceeding $300 billion, mostly in services.”
Another possible conclusion from the following: If you’re still holding out hope the Design Automation Conference is anchor tenant of the conference year, you should let that go. The amount of news these companies are releasing around ARM TechCon far out weighs what they’re releasing around DAC.
** ARM announced on October 1st “two new physical IP implementation solutions for its silicon partners to help simplify the path to implementation for their FinFET physical designs. ARM Artisan Power Grid Architect will reduce overall design time by creating optimal SoC power grid layouts, while ARM Artisan Signoff Architect increases accuracy and precision in managing on-chip variation over existing methodologies. These new physical IP implementation solutions strengthen the commitment from ARM to enable delivery of real silicon with the speed consumers are demanding.”
** ARM announced on October 1st, mbed OS, a free operating system for ARM Cortex-M processor based devices that consolidates the fundamental building blocks of the IoT in one integrated set of software components; mbed Device Server, a licensable software product that provides the required server-side technologies to connect and manage devices in a secure way, that also provides a bridge between the protocols designed for use on IoT devices and the APIs that are used by web developers; and mbed.org, the focus point for a community of more than 70,000 developers around mbed. The website provides a comprehensive database of hardware development kits, a repository for reusable software components, reference applications, documentation and web-based development tools.
** ARM and TSMC announced on October 2nd a new multi-year agreement that will deliver up ARMv8-A processor IP optimized for TSMC 10FinFET process technology. Per the Press Release: “Because of the success in scaling from 20SoC to 16FinFET, ARM and TSMC have decided to collaborate again for 10FinFET. This early path-finding work will provide valuable learning to enable physical design IP and methodologies in support of customers to tape-out 10FinFET designs as early as Q4 2015.”
Monday, July 28th, 2014
There are three kinds of written word in the world today: books, newspapers/magazines, and all of the rest of it which now lives on the shifting sands of an ever-evolving electronic substrate. Even today, however, even as those ‘effervescent electrons’ garner more and more readers, it’s books-on-paper that continue to hold the most caché, the most gravitas-laden sense of permanence, and the most awe-inspring-for-the-ages kind of wow factor: Really? You wrote a book? Wow!
Hence, when a 220-page book-on-paper called Fabless: The Transformation of the Semiconductor Industry was made available to the EDA community at the 51st annual Design Automation Conference this past month in San Francisco, it was worth noting for several reasons: For the gravitas of the offering; For the permanence of the tome; And for the price, which thanks to eSilicon Corp. was free to all for the taking.
Written by SemiWiki.com gurus Daniel Nenni and Paul McLellan, this Fabulous Fabless book-on-paper was handed out during a buzzy networking event on the spacious East Side of Moscone Center early one evening during the week of DAC in June. At that noisy, ebullient reception, the libations were flowing liberally and so was the printed word.
Anyone milling about in the crowd quickly became the proud owner of Nenni/McLellan’s cheery, well-written history of the world – that special world consisting of everything termed “technology” since 1947 – and could even get signed copies, if they were able to elbow their way across the room to where the authors were perched side-by-side at a table with the express purpose of applying ink-to-paper on the front piece of their book.
Thursday, May 22nd, 2014
It’s just amazing that DAC has become so thoroughly a show about IP that there are two major parties happening in San Francisco in June that have IP in their name: HOT IP Party and Stars of IP Party.