Posts Tagged ‘Mentor Graphics’
Thursday, February 23rd, 2017
Oski Technology has added a new page to its playbook. Now it’s not just a services company, it’s an IP company as well. This week, the company announced it’s Formal Verification IP Library targeted at those companies using ARM’s AMBA interface protocols.
When we spoke on the phone about the announcement, I asked Oski VP of Applications Engineering Roger Sabbagh why now for this product release. He said: “I personally have been working in Formal since the year 2000, back when I joined 0-In, and over the years I’ve learned that formal adoption grows slowly.
“Yet although there has never been a knee in the curve, we have seen some important developments in the industry. Synopsys developed PC Formal and Cadence bought Jasper, both indicating that Formal is catching on slowly but surely.”
Thursday, February 9th, 2017
This week, the ESD Alliance announced that Sonics CEO Grant Pierce has been elected chair of the organization’s Board of Directors. His election is unique in several ways: Pierce is the first CEO of an IP company to lead the Alliance; he replaces two co-chairs, Cadence CEO Lip-Bu Tan and PDF Solutions, John Kibarian; and he is only the second CEO of a non-publicly traded company to serve as Board Chair, the other being Jasper CEO Kathryn Kranen who took the reins in 2012.
When Pierce and I spoke by phone on Tuesday about his election, he noted the unique circumstances of his new leadership role: “When I joined the board several years ago, it was with the intention to add a new point of view to what was then the EDA Consortium, to help the organization reflect the emerging reality of what was happening in the marketplace with respect to IP companies.
“In some ways, the IP companies consider themselves to be a necessary evil. Every chip developed today involves some sort of third-party IP, so having a place on the Board of the ESD Alliance is essential.”
Thursday, October 27th, 2016
Raise your hand if you think innovation comes out of small, nimble, edgy startups. Keep your hand up if you think consolidation is antithetical to the inventive culture closely associated with small, nimble edgy startups where everybody works outside of their job description and above their grade. Now put your hand down and tell us what you think about yet another merger in the semiconductor industry.
Yes, happy for investors that Qualcomm is buying NXP, but the end result will be a nasty one for technical innovators in EDA. Yet another reduction in the number of customers for EDA tools. Not necessarily a reduction in the number of seats, but a reduction in the number of actual separate corporate entities looking for tools for chip design.
Of course, for those who love large, lumbering organizations with almost as many people in the typing pool as in the engineering pool – more consolidation is great news for the semiconductor business and for the electronic design automation business, as well.
However, for those who still remember when EDA was a Wild West full of crazy startups, wacky business ideas, and loads of shifting sands between a constantly morphing/re-morphing population of EDA startups and an also-always morphing/re-morphing population of chip-design customers – take note: Those days are gone. Forever.
Thursday, October 13th, 2016
Next week, DVCon is once again in Europe, October 19-20 in Munich. A marvelous agenda has been laid out for this year’s 2-day conference, including three keynoters that pretty much sum up the state of things in the industry here in 2016. If you want to know where to apply your resources – both human and material – over the next decade, look no farther than these three talks.
It’s a tiring trip from Silicon Valley to Bavaria, but the quality of these presentations, combined with the rest of the content at DVCon Europe, will make the trip well worth the effort. Hope you’re going.
Thursday, September 22nd, 2016
Geoff Tate, founding CEO at Rambus, is busy – again. These days he’s leading the charge with a new FPGA-based enterprise that, per Tate, wants to be “the first to the party” – a party that’s all about providing FGPA-based IP to a market increasingly in need of these products.
When Tate and I spoke by phone recently, he offered the Flex Logix elevator pitch, and then focused on the company’s August press release.
“We are like the ARM of FPGA,” Tate said, and then laughed. “No, we are not expecting to be acquired by SoftBank anytime soon.”
“However, ARM was the first to successfully embed processors,” he said, “and at Flex Logic we are [doing that] with FPGAs.”
Thursday, June 23rd, 2016
At this writing, midnight is approaching here in California, it’s June 23rd, and highly anticipated news is arriving out of the UK. It’s Friday morning there and the results of the Should I stay or Should I go referendum have been announced. To the astonishment of some subset of the world, and undoubtedly their stock markets, the UK is leaving the European Union.
And so a page turns, another chapter begins, and now there’s a twist in the plot line that few saw coming. Although it’s a dark and starry night here, the sun is up in the UK and the future looks suddenly different, no matter if you’re standing on the streets of London, York, Edinburgh – or Cambridge.
The very same Cambridge where ARM Ltd. is headquartered.
Thursday, June 9th, 2016
When SRC’s Bill Joyner took the podium this past Sunday evening at the 53rd DAC in Austin, he did something that’s never been done before: Present a panel about careers that wasn’t part of a Workshop for Women in EDA.
Up until 7 o’clock on June 5, 2016, a conversation about career perspectives was such a non-technical topic, it could only be found in Marie Pistilli’s beloved workshop, a venue where work/life balance, Academia vs. Industry, and how to promote your brand within the organization were thoroughly discussed every year for 15 years at DAC.
Now IEEE’s Council on EDA, CEDA, has made the bold decision to pick up where Marie’s workshop left off, sponsoring this week’s event and broadening the audience and the appeal.
Joyner had four people on his panel, a generous two hours to hash out various universal questions, and enough of a sense of humor to offer to wear the necktie he’d brought with him to add gravitas, or not to wear the tie to appear hipster and cool. He quickly decided to go without the tie, and the ensuing conversation went something like this.
Thursday, May 12th, 2016
IP will be well represented at DAC according to Adapt IP Michael “Mac” McNamara, and he should know. He’s helped build the IP Track at the show and is concerned that everyone understand the IP-related content in Austin this year will be deep and wide.
Mac and I spoke by phone recently. He’d read a blog a posted here in April expressing skepticism about IP coverage at DAC. Therein, I suggested the content set for Austin in June was inadequate, given the important role IP plays in chip design today.
A thoughtful McNamara wanted to respond to this critique; he wanted to evangelize for the quality of the content at DAC – particularly as he is Vice Chair of the conference this year and will be General Chair in 2017. [Cadence’s Chuck Alpert is General Chair here in 2016.]
Thursday, February 25th, 2016
Mentor Graphics announced new applications this week for the company’s Veloce emulation platform. These new apps, per the company, are added to Mentor’s “arsenal of software innovations” for Veloce. The three new apps include:
* Veloce Deterministic ICE: Designed to overcome unpredictability in ICE environments by adding 100-percent visibility and repeatability for debug; provides access to other ‘virtual-based’ use models.
* Veloce DFT: Designed to accelerate DFT verification prior to tape-out to minimize the risk of catastrophic failure; significantly reduces run times when verifying designs after DFT insertion.
* Veloce FastPath: Designed to optimize emulation performance when verifying large multi-clock SoC designs by enabling faster model execution speed.
Thursday, February 18th, 2016
The folks at DVCon have done a brilliant thing. They’ve invited Lauro Rizzatti to present at their upcoming conference on a topic that Rizzatti knows better than anybody, emulation. Last year alone, he wrote 40 articles on the subject.
More importantly, of course, Rizzatti helped guide EVE, the high-flying European EDA company that led the field in emulation from their base in France before being acquired by Synopsys in 2012. I spoke with Rizzatti this week about emulation, his talk at DVCon, and his recent endeavors writing about a technology that’s taking the world of verification by storm.
He started by establishing the importance of emulation today: “This technology is here to stay. It’s been around for 30 years, and [historically] was something only the big companies could afford to buy and use. They needed an army of engineers. Today it’s no longer a niche technology, however; it’s mainstream.”