Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
SNPS Sensor Subsystem: far-reaching implications
August 15th, 2013 by Peggy Aycinena
Late last month, Synopsys announced another important addition to their portfolio, the DesignWare Sensor IP Subsystem. Per the company, “The new IP subsystem is optimized to process data from digital and analog sensors, offloading the host processor and enabling more efficient processing of the sensor data with ultra-low power.
“The hardware components [include] a power- and area-efficient DesignWare 32-bit ARC EM4 processor, digital peripherals such as I2C, SPI, ADC interface, and GPIO, and hardware accelerators for signal processing functions. The software components [include] a comprehensive library of digital signal functions utilized in higher-level applications such as analog and digital sensor fusion, and mathematical functions, filtering and interpolation. In addition, peripheral drivers ease integration of the I/O with the ARC EM processor.”
With announcements such as this, two questions come to mind: Why are companies like Synopsys still classified as EDA with some IP, and not IP with some EDA? And isn’t Synopsys setting itself up as competition for its customers by selling such a sophisticated chunk of IP?
I had a chance to speak by phone last week with Rich Collins, Marketing Manager for Synopsys’ IP Subsystems, who answered my second question with ease: “I don’t think so, because this [subsystem] is not a critical part of the SoC. Our customers are trying to achieve a higher order of functionality. It’s our value proposition that by using this subsystem, we save them months and months of design and verification effort. We help them get to market more quickly, we are not in competition with them.”
Collins did not directly answer my first question, is Synopsys now more IP than EDA, but one might infer an answer from his subsequent comments.
He said, “There are two main trends in the semiconductor industry today, which [inspired] Synopsys to develop this new product. The push for more integration onto the SoC is driving the concept of subsystems and not just discrete IP. This is the second subsystem [developed] at Synopsys. We released an audio subsystem a year ago.
“The other factor driving our new subsystem is the growing complexity of sensor implementation. Integrating together [the various parts of an SoC] to make higher-level functions means much more processing is needed to handle the data. The sensor market is exploding, with predicted growth rates of 20-to-22 percent per year. By 2017, there will be over 30 billion sensors in the world.”
I stopped him for a minute: “If there are 7 billion people in the world, doesn’t that work out to more than 4 sensors per person? What are all those sensors going to be doing?”
“Does that worry you?” I asked.
He said, “I think it’s great. Look at geo-fencing. You’ll walk into a combination of sensors, your phone and GPS device will determine where you are and certain apps will be unlocked and made available. In terms of lifestyle, it will make life easier for you.
“In your car, it will help in terms of safety. Lane detection will not allow a car to change lanes [if it isn’t safe], while braking by determining where things are relative to the car will definitely [provide] a wanted improvement.”
“Still, are you worried about issues of privacy in a world peppered with sensors?” I asked.
“Sensors are not the things that create invasions of privacy,” Collins said. “That is an issue of who sees the sensor data. In terms of sensor control and the processing of data, these topics are orthogonal to [issues] of privacy.”
I apologized for steering the conversation off-topic and we returned to a discussion of the new Synopsys subsystem: “Who is the target market for your new product?”
Collins said, “Our market is anyone [designing] an SoC implementation where sensor data is critical, and the ability to process the sensor data. Our subsystem can be dropped into the customer’s design, and then they can focus on the bigger SoC.”
He added that certain decisions were made along the way in developing the DesignWare Sensor Subsystem: “We are not actually implementing sensors, which are analog in nature and tied to a specific process node. We didn’t want to go down that path, didn’t want to be tied to a specific process node.
“[What we are selling] is entirely synthesizable and retargetable to any process node. Anything related to analog-type noise or interference, the sensor implementation has to deal with that. The sensor data must be converted to a digital interface by the time it touches our subsystem.
“It’s just like any problem the chip vendor has to deal with – frequency of clocks, interference, the SoC-level issues. The IP provider might make an assessment [of the problems], but we’re not the provider of the end SoC. That’s the SoC team’s [job], not ours.”
“Who is the competition for the type of sensor subsystem Synopsys is announcing?” I asked.
Collins said, “Basically, we’re competing with the concept of roll your own. Our value proposition is that you no longer need to roll your own sensors, you don’t have to create peripherals yourself.
“We’re providing that whole level of integration with an easy to use GUI that allows you to drag-and-drop all of the components and consider the options – things like how closely coupled the memory is, the number and types of interfaces, whether functions are implemented in software or hardware, and tradeoffs between area, power, and performance. You configure the subsystem and then just drop it into your SoC.”
“So what’s next for Synopsys?” I asked.
Collins said, “At Synopsys, we are trying to cover as broad a spectrum of implementations with our deliverables as possible. Now that we’ve delivered an audio subsystem and a sensor subsystem, we’re planning to provide additional new subsystems in the future.
“We’re evaluating other markets and [when the decision is made], we will take a similar approach in development. We see these types of subsystems as extremely complex pieces of IP. So complex, they have become like an embedded SoC in themselves.”