Please Crispify: The ESD Alliance System Scaling Working Group
May 19th, 2016 by Peggy Aycinena
It’s a poorly kept secret that Bob Smith was brought in as Executive Director of EDAC last year to shake things up, to breathe new life into the sails of a somewhat becalmed organization. Well, in the category of be careful what you ask for, here’s how things have gone so far:
New companies have joined the consortium, the newest member of the Board of Directors is not a CEO, a plethora of monthly panels have engaged the industry in thought-provoking discussions about innovation vis-à-vis commercial enterprise, a marketing deal has been struck with Semico, and the whole friggin’ organization has been re-branded as the ESD Alliance to reflect an intent to get more IP guys, more Embedded guys, and more Yet-to-be-identified guys into the alliance than just the traditional anchor tenants from EDA.
But none of this comes close to the potential impact of the latest disruptive idea that ESDA is proposing: The founding of a brand new working group that could very well redefine the whole semiconductor supply chain: The ESD Alliance System Scaling Working Group.
That’s the only word to describe my impressions, after sitting for 90 minutes at the back of the room on Wednesday evening at ESDA headquarters in Silicon Valley, of the discussion that unfolded under the leadership of the ever-energetic President of eda 2 asic, Herb Reiter, who was standing at the front of the room.
The group in attendance at this ESDA meeting engaged in a dynamic back-and-forth in their attempts to nail down a proposed charter for the aforementioned Working Group.
Per Herb’s slides, the broad objectives for the group would include: Moving focus in the industry from transistor to system scaling, bringing design and manufacturing together through a combination of news, education, and collaboration, and focusing on those methodologies and best practices that would dovetail with the various standards efforts that perpetually percolate out of IEEE, Accellera, Si2, and Semi.
Of course, Herb Reiter is hardly a novice when it comes to establishing and growing Working Groups. He’s had a great track record of doing this kind of thing over X number of years, once for Si2, once for GSA, and once for Sematech. He really knows how to do this – how to create focus and generate participation – so if anybody can get the ESDA_SSWG off the ground, Herb is the one to do it.
Nonetheless, even acknowledging Herb’s abilities, there were still huge questions being thrown about, some more politely than others, during the discussion/debate on Wednesday evening.
Principally, what is the intent of this System Scaling Working Group?
1) To be a Standards Body
2) To create a Road Map
3) To create a new Data Exchange Format
4) To create a Reference Board
5) To write a White Paper
6) To be a Talking Shop
Not for a moment did Herb pretend to have an answer to these questions. He just wanted to get the idea for the Working Group out there, for the attendees to go out, discuss the thing with their colleagues, and get back to him with a) more questions and b) some answers.
And to that end, Herb presented this thesis:
“Multi-die ICs won’t replace SoCs, they’ll complement the mostly logic-containing dies [of today] with die-level IP blocks containing heterogeneous functions. These IP blocks will enable systems to become ‘environmentally aware’ as well as user-friendly, attractively priced and profitable!”
Change is in the air, and ESDA’s evolution is just the tip of the iceberg.
Per one attendee on Wednesday night, referencing the latest hotness in the industry: “Yes, the IoT means the end of the SoC, but a billion IoT devices are only going to fill 10 wafers. Where’s the money in that?”
But that’s just one of the questions that emerged on Wednesday. There was also …
1) If packaging of heterogeneous die is the solution to the end of Moore’s Law, the end of scaling, why does the industry need a Working Group to point that out? Don’t they already know?
2) And why don’t the chip guys know that it’s all about the packaging? Why are they so stuck in their silo, they’re unable to see over the wall to the brutal realities of manufacturing whole systems?
3) There’s not enough information, PDKs, and design tools to create chips that can be properly manufactured, let alone packaged. Why doesn’t somebody address these needs?
Okay, so 90 minutes on a Wednesday night wasn’t enough time to sort out these cosmic questions.
And in fairness to ESDA, neither Herb Reiter nor Bob Smith were suggesting the Alliance could solve everything for everyone with the establishment of this Working Group. But what they did suggest was a way of inserting ESDA into a critical conversation about closing the yawning gap between design and manufacturing.
And all of this in the face of the most profound critique of the evening, lobbed at them from someone else who was sitting at the back of the room …
“All of this is very admirable, these ideas for this Working Group, but it’s not going to go anywhere unless we crispify what we are doing here. Crispify the value of this Working Group to the industry.”
Wow, I said from my corner. I couldn’t have said it better myself!
Tags: Accellera, Bob Smith, EDAC, ESD Alliance, GSA, Herb Reiter, IEEE, Sematech, Semi, Semico, Si2, System Scaling Working Group