Open side-bar Menu
 IP Showcase
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

Arrow Devices: VIP meet & greet

May 29th, 2014 by Peggy Aycinena

Take a moment to meet Arrow Devices. Although they will be exhibiting at DAC next week in San Francisco, Arrow is based in Bangalore so the following interview was conducted via email. I’m speaking here with Aditya Mittal. Before establishing the company, Mittal was a Senior Design Engineer at Nvidia.


Peggy – Arrow Devices is new to me; how long have you been in business and where are you located?

Aditya – I started Arrow Devices in mid 2008. Initially, we started by doing design/verification consulting. During our consulting assignments, we saw a larger business opportunity in the verification arena. Somewhere around mid-2012, we started working on developing verification IPs.

Arrow Devices is headquartered in Bangalore with a presence in the Bay Area, and soon in Israel and Taiwan.

Peggy – Why focus on VIP for USB’s, etc. Is this where your team’s expertise is focused?

Aditya – We are focusing on new and emerging standards in the USB and MIPI domains. These standards are complex and require a high quality verification effort. As engineers, we want to develop solutions that solve tough problems. This also makes business sense and such solutions also add more value to our customers.

Verification complexity is increasing faster than Moore’s law and thus becoming a real problem for chip and IP companies worldwide. Arrow Devices aims to solve these verification problems through innovative automation initiatives.

Peggy – There are fundamental issues around the validity of IP, even known-good IP. Are we compounding the problem by using VIP?

Aditya – Not at all. In fact, third-party VIP offers a quick and cost-effective way for IP buyers to check the suitability of IP. This is one of the reasons why, along with VIP, we also provide comprehensive test suites to our customers. Our customers can carry out IP diagnostics using our ready-made test suite, and avoid costly mistakes.

Peggy – Should every IP vendor provide a package of VIP and design services to their customers?

Aditya – VIP provided by an IP vendor will always remain suspect due to the possibility of “false positives.” The IP-VIP combination provided by a vendor is expected to work. The real test for an IP would come from a VIP and test suite that has been architected and developed by a VIP team, that has not interacted with the IP team, with just the specification as a reference.

Peggy – I have been researching technical and business issues around purchasing IP for a hypothetical design project, a Dick Tracy keychain. If I buy products from Arrow Devices, how much free design consultation comes with that purchase?

Aditya – Arrow Devices provides its customers with extensive design/verification consultation. We achieve this by not only providing expert consultants, but also by encoding our expertise into our products in the form of various features, diagnostic scripts, debugging tools etc.

Peggy – Who are the big VIP vendors in the world today?

Aditya – Verification has been identified as a key challenge faced by chip companies worldwide. Consequently, most big EDA vendors are working on providing VIP solutions.

Peggy – Is there so much need that no one vendor actually has to worry about the competition, even the big vendors, because the potential customer base is so vast?

Aditya – There is a big need in the market for verification solutions. However, like in any industry there is a real limit to the market base, and therefore each vendor needs to keep re-inventing itself to distinguish itself from competition.

Peggy – I see there is a blog on your website asking if every block of IP installed in a design needs to be re-verified? It seems the answer is always yes, no matter the quality of the IP or the vendor: Trust but verify?

Aditya – Design mistakes that make it to silicon can be very, very costly. “First-pass silicon” is not optional anymore. Even if you touch one gate in the design for fixing a bug, adding a new feature, or for customization, you will need to regain confidence over the IP by re-verifying it.

With today’s design complexity, simple and innocuous changes can often have unforeseen consequences. A good verification solution can go a long way in achieving the goal of reducing overall design costs.

Peggy – Finally, I see your management team includes a graduate from IIT Bombay and a graduate of IIT Delhi. A whimsical question: Which is the better school?

Aditya – While both are great schools and offer a good peer group and faculty, in my opinion the best school is the “school of hard knocks.”


Related posts:

Tags: , ,

Leave a Reply

Your email address will not be published. Required fields are marked *


You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>

DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy